H8S-2615 Datasheet, PDF (182/479 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer

8.3.6 Timer Counter (TCNT)
The TCNT registers are 16-bit readable/writable counters. The TPU has six TCNT counters, one
for each channel.
The TCNT counters are initialized to H'0000 by a reset, and in hardware standby mode.
The TCNT counters cannot be accessed in 8-bit units; they must always be accessed as a 16-bit
unit.
8.3.7 Timer General Register (TGR)
The TGR registers are dual function 16-bit readable/writable registers, functioning as either output
compare or input capture registers. The TPU has 16 TGR registers, four each for channels 0 and 3
and two each for channels 1, 2, 4, and 5. TGRC and TGRD for channels 0 and 3 can also be
designated for operation as buffer registers. The TGR registers cannot be accessed in 8-bit units;
they must always be accessed as a 16-bit unit. TGR buffer register combinations are TGRA–
TGRC and TGRB–TGRD.
8.3.8 Timer Start Register (TSTR)
TSTR selects the TCNT operation/stoppage for channels 0 to 5. When setting the operating mode
in TMDR or setting the count clock in TCR, first stop the TCNT counter.
Bit Bit Name
7, 6 
Initial
value
All 0
5
CST5
0
4
CST4
0
3
CST3
0
2
CST2
0
1
CST1
0
0
CST0
0
R/W Description

Reserved
The write value should always be 0.
R/W Counter Start 5 to 0
R/W These bits select operation or stoppage for TCNT.
R/W If 0 is written to the CST bit during operation with the
R/W ^{TIOC pin designated for output, the counter stops but}
the TIOC pin output compare output level is retained. If
R/W _{TIOR is written to when the CST bit is cleared to 0, the}
R/W pin output level will be changed to the set initial output
value.
0: TCNT_0 to TCNT_5 count operation is stopped
1: TCNT_0 to TCNT_5 performs count operation
Rev. 2.00, 05/04, page 148 of 442