PD46365084B Datasheet, PDF (17/39 Pages) Renesas Technology Corp – 36M-BIT QDRTM II SRAM 4-WORD BURST OPERATION

μPD46365084B, μPD46365094B, μPD46365184B, μPD46365364B
DC Characteristics 1 (TA = 0 to 70°C, V_DD = 1.8 ± 0.1 V)
Parameter
Symbol
Test condition
Input leakage current
I/O leakage current
Operating supply current
(Read cycle / Write cycle)
ILI
ILO
IDD
VIN ≤ VIL or VIN ≥ VIH, -E33
II/O = 0 mA,.
Cycle = MAX.
-E40
MIN.
−2
−2
MAX.
Unit Note
x8 x9 x18 x36
+2
μA
+2
μA
520 520 580 740 mA
460 460 520 650
Standby supply current
(NOP)
Output HIGH voltage
Output LOW voltage
ISB1
VIN ≤ VIL or VIN ≥ VIH, -E33
390 390 400 430 mA
II/O = 0 mA,.
Cycle = MAX.
-E40
370 370 380 400
Inputs static
VOH(Low) |IOH| ≤ 0.1 mA
VDDQ − 0.2
VDDQ
V 3, 4
VOH
Note1
VDDQ/2−0.12 VDDQ/2+0.12
V 3, 4
VOL(Low) IOL ≤ 0.1 mA
VSS
0.2
V 3, 4
VOL
Note2
VDDQ/2−0.12 VDDQ/2+0.12
V 3, 4
Notes 1. Outputs are impedance-controlled. | I_OH | = (V_DDQ/2)/(RQ/5) ±15% for values of 175 Ω ≤ RQ ≤ 350 Ω.
2. Outputs are impedance-controlled. I_OL = (V_DDQ/2)/(RQ/5) ±15% for values of 175 Ω ≤ RQ ≤ 350 Ω.
3. AC load current is higher than the shown DC values.
4. HSTL outputs meet JEDEC HSTL Class I standards.
R10DS0090EJ0400 Rev.4.00
Nov 09, 2012
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