H8S2633 Datasheet, PDF (1355/1487 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Appendix B Internal I/O Register
DRAMCR—DRAM Control Register
H'FED7
(This function is not available in the H8S/2695.)
Bit
:7
RFSHE
Initial value : ₀
R/W
: _R/W
6
CBRM
0
R/W
5
RMODE
0
R/W
4
CMF
0
R/W
3
CMIE
0
R/W
2
CKS2
0
R/W
Bus Controller
1
CKS1
0
R/W
0
CKS0
0
R/W
Refresh mode
0
Do not perform self-refresh in software standby
mode.
1
Perform self-refresh in software standby mode.
CBR refresh mode
0
External access enabled at CAS-before-RAS refresh.
1
External access disabled at CAS-before-RAS refresh.
Refresh control
0
Do not perform refresh control.
1
Perform refresh control.
Compare match flag
0
[Clearing condition]
Writing 0 to CMF flag after reading CMF=1.
1
[Setting condition]
When RTCNT=RTCOR.
Compare match interrupt enable
0
CMF flag interrupt request (CMI) disabled.
1
CMF flag interrupt request (CMI) enabled.
Refresh counter clock select
CKS2
CKS1
CKS0
0
0
0
1
1
0
1
1
0
0
1
1
0
1
No counting operation
Counting on ø/2
Counting on ø/8
Counting on ø/32
Counting on ø/128
Counting on ø/512
Counting on ø/2048
Counting on ø/4096
Rev. 5.00 Mar 28, 2005 page 1293 of 1422
REJ09B0234-0500