H8S2556 Datasheet, PDF (131/982 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family/H8S/2500 Series

Section 5 Interrupt Controller
Section 5 Interrupt Controller
5.1 Features
This LSI controls interrupts with the interrupt controller. The interrupt controller has the following
features:
• Two interrupt control modes
⎯ Any of two interrupt control modes can be set by means of the INTM1 and INTM0 bits in
the system control register (SYSCR).
• Priorities settable with IPR
⎯ An interrupt priority register (IPR) is provided for setting interrupt priorities. Eight priority
levels can be set for each module for all interrupts except NMI. NMI is assigned the
highest priority level of 8, and can be accepted at all times.
• Independent vector addresses
⎯ All interrupt sources are assigned independent vector addresses, making it unnecessary for
the source to be identified in the interrupt handling routine.
• Nine external interrupt pins
⎯ NMI is the highest-priority interrupt, and is accepted at all times. Rising edge or falling
edge can be selected for NMI.
⎯ Falling edge, rising edge, both edges, or level sensing can be independently selected for
IRQ7 to IRQ0.
• DTC control
⎯ The DTC can be activated by an interrupt request.
Rev.5.00 Sep. 27, 2007 Page 85 of 932
REJ09B0099-0500