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| M66591GP_15 Datasheet, PDF (127/135 Pages) Renesas Technology Corp – ASSP (USB2.0 Peripheral Controller) | |||
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M66591GP
4.9.14 DMA transfer write timing (when set to separate bus and burst transfer)
DREQ
DACK
WR0_N, WR1_N
Note 5-1
48
tw(CTRL_B)
47
tw(cycle)
trec(CTRL_B) 49
43 tsu(D) th(D) 44
D15-0
D0
D1
D2
DEND
tdis(CTRL-Dreq) 17
tdis(CTRLH-Dreq) 18
Dn
45
46
tsu(Dend) th(Dend)
4.9.15 DMA transfer read timing (when set to separate bus and burst transfer)
DREQ
DACK
tw (cycle) 47
48
tw (CTRL_B) trec (CTRL_B) 49
RD_N
Note 5-2
3
ta (CTRL - D)
tv (CTRL - D) 4
D15-0
D0
D1
DEND
17
tdis (CTRL - Dreq)
Dn-1
11 ta (CTRL - DendV)
Dn
12
tv (CTRL - DendV)
Rev.1.00 Nov. 30, 2004 page 125 of 131
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