HYB25DC256163CE-4 Datasheet, PDF (9/29 Pages) Qimonda AG – 256-Mbit Double-Data-Rate SGRAM

Internet Data Sheet
HYB25DC256163CE
256-Mbit Double-Data-Rate SGRAM
3
Functional Description
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Field Bits Type¹⁾ Description
BL
[2:0] W
Burst Length
Number of sequential bits per DQ related to one read/write command.
Note: All other bit combinations are RESERVED.
BT
3
CL
[6:4]
001 2
010 4
010 8
Burst Type
See Table 6 for internal address sequence of low order address bits.
0 Sequential
1 Sequential
CAS Latency
Number of full clocks from read command to first data valid window.
Note: All other bit combinations are RESERVED.
MODE [12:7]
011 3
Operating Mode
Note: All other bit combinations are RESERVED.
000000 Normal Operation without DLL Reset
000010 Normal Operation with DLL Reset
1) W = write only register bit
Rev. 1.1, 2007-01
9
03292006-SR4U-HULB