HYB25DC256163CE-4 Datasheet, PDF (23/29 Pages) Qimonda AG – 256-Mbit Double-Data-Rate SGRAM

Internet Data Sheet
HYB25DC256163CE
256-Mbit Double-Data-Rate SGRAM
Symbol
–4
–5
–6
Unit
Note¹⁾/Test Condition
TABLE 19
I_DD Specification
I_DD0
115
75
65
mA
2)3)
I_DD1
135
95
80
mA
3)
I_DD2P
6
4
4
mA
3)
I_DD2F
45
30
25
mA
3)
I_DD2Q
35
20
17
mA
3)
I_DD3P
23
13
11
mA
3)
I_DD3N
65
43
36
mA
3)
I_DD4R
150
100
85
mA
3)
I_DD4W
160
100
90
mA
3)
I_DD5
240
140
120
mA
3)
I_DD6
2.8
1.4
1.4
mA
4)
I_DD7
315
210
180
mA
3)
1) Test conditions: V_DD = 2.7 V, T_A = 10 °C
2) I_DD specifications are tested after the device is properly initialized and measured at 133 MHz for DDR266, 166 MHz for DDR333, and 200
MHz for DDR400, 250MHz for DDR500
3) Input slew rate = 1 V/ns
4) Enables on-chip refresh and address counters
Rev. 1.1, 2007-01
23
03292006-SR4U-HULB