HYB18M1G320BF Datasheet, PDF (55/62 Pages) Qimonda AG – DRAMs for Mobile Applications 1-Gbit x32 DDR Mobile-RAM

Data Sheet
3.3
HY[B/E]18M1G320BF
1-Gbit DDR Mobile-RAM
3.0
2.5
2.0
1.5
1.0
0.5
0
-0.5
-1.0
-1.5
0
Max. Amplitude = 0.9V
FIGURE 40
AC Overshoot and Undershoot Definition
Overshoot
VDD
Max. Area = 3V-ns
VSS
Undershoot
1
2
3
4
5
6
7
time (ns)
Operating Currents
Parameter & Test Conditions
TABLE 26
Maximum Operating Currents
Symbol
Values
- 7.5
Unit Note¹⁾²⁾³⁾
4)
Operating one bank active-precharge current:
I_DD0
100
mA
t_RC = t_RCmin; t_CK = t_CKmin; CKE is HIGH; CS is HIGH between valid commands;
address inputs are SWITCHING; data bus inputs are STABLE
Precharge power-down standby current:
I_DD2P
1.40
mA
all banks idle, CKE is LOW; CS is HIGH, t_CK = t_CKmin; address and control inputs
are SWITCHING; data bus inputs are STABLE
Precharge power-down standby current with clock stop:
I_DD2PS
1.20
mA
all banks idle, CKE is LOW; CS is HIGH, CK = LOW, CK = HIGH; address and
control inputs are SWITCHING; data bus inputs are STABLE
Precharge non power-down standby current:
I_DD2N
30
mA
all banks idle, CKE is HIGH; CS is HIGH, t_CK = t_CKmin; address and control inputs
are SWITCHING; data bus inputs are STABLE
Precharge non power-down standby current with clock stop:
I_DD2NS
3.0
mA
all banks idle, CKE is HIGH, CS is HIGH, CK = LOW, CK = HIGH; address and
control inputs are SWITCHING; data bus inputs are STABLE
Active power-down standby current:
I_DD3P
4
mA
one bank active, CKE is LOW; CS is HIGH, t_CK = t_CKmin; address and control inputs
are SWITCHING; data bus inputs are STABLE
Rev.1.00, 2007-03
55
02022006-J7N7-GYFP