SAA7391 Datasheet, PDF (92/108 Pages) NXP Semiconductors – ATAPI CD-R block encoder/decoder

Philips Semiconductors
ATAPI CD-R block encoder/decoder
Objective specification
SAA7391
handbook, full pagewidth
DRQ (drive)
DACKb (host)
STOP (host)
DMARDYb (drive)
STROBE (host)
DATA (host)
DA and CS
tli
tli
tli
tli(min)
tsu(DV)
tsu(ass/deass)
t(IORDY)(max)
tsu(ass/deass)
th(DV)
CRC
tsu(ass/deass)
Fig.27 Host terminating a DMA burst during a write command.
MGK532
11.3 Sub-CPU interface timing
Table 111 Timing parameter values for Figs 28 and 29
SYMBOL
t_AVLL
t_RLDV
t_W(ALE)
t_h(A)
t_DVWL
PARAMETER
address valid to ALE LOW
RD LOW to valid data in
ALE pulse width
address hold time
DATA valid before WR LOW
Note
1. t_CLCL = the SAA7391 system clock period.
MIN.
10
−
35
10
0
MAX.
−
7t_CLCL + 20⁽¹⁾
−
−
−
UNIT
ns
ns
ns
ns
ns
1997 Aug 01
92