SAA7824 Datasheet, PDF(9/89 Page) NXP Semiconductors – CD audio decoder, digital servo and filterless DAC with integrated pre-amp and laser control (PhonIC)

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SAA7824 Datasheet, PDF (9/89 Pages) NXP Semiconductors – CD audio decoder, digital servo and filterless DAC with integrated pre-amp and laser control (PhonIC)

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Philips Semiconductors

CD audio decoder, digital servo and ï¬lterless

DAC with integrated pre-amp and laser control

Product speciï¬cation

SAA7824

7 FUNCTIONAL DESCRIPTION

7.1 Data acquisition and HF data path

The SAA7824 removes the need for an external diode signal pre-amplifier.

A simplified diagram of the HF data path is illustrated in Fig.3. The high-pass filter, equalizing filter HF gain and adaptive

slicer are all register programmable, thus enabling the SAA7824 to be optimized for the intended application.

handbook, full pagewidth

hf_gain 5:0

d1_hf

d2_hf

d3_hf

d4_hf

summing amplifier

op-amp

Vref

bypass

adaptive slicer

comp

67.7 MHz

sliced

data

op-amp

high-pass filter

op-amp

Vana

equalising

filter

THRESHOLD

CONTROL

MBL438

Fig.3 Simplified block diagram of the HF data path and adaptive slicer.

7.2 Decoder part

7.2.1 PRINCIPLE OPERATING MODES OF THE DECODER

The decoding part supports a full audio specification and

can operate at single-speed (n = 1), double-speed (n = 2)

and quad-speed (n = 4). The factor ânâ is called the

overspeed factor. A simplified data flow through the

decoder part is illustrated in Fig.7 for the M0 version and

Fig.8 for the M1 version.

7.2.2 DECODER SPEED AND CRYSTAL FREQUENCY

The SAA7824 is a 1Ã, 2Ã and 4Ã (three-speed) decoding

device, with an internal Phase-Locked Loop (PLL) clock

multiplier. Table 1 gives the playback speeds that are

achievable in conjunction with crystal frequency,

mechanism, and internal clock settings (selectable via

decoder register B).

7.2.3 LOCK-TO-DISC MODE

For electronic shock absorption applications, the SAA7824

can be put into lock-to-disc mode. This allows Constant

Angular Velocity (CAV) disc playback with varying input

data rates from the inside-to-outside of the disc.

In the lock-to-disc mode, the FIFO is blocked and the

decoder will adjust its output data rate to the disc speed.

Hence, the frequency of the I2S-bus (WCLK and SCLK)

clocks are dependent on the disc speed. In the lock-to-disc

mode there is a limit on the maximum variation in disc

speed that the SAA7824 will follow. Disc speeds must

always be within 25% to 100% range of their nominal

value. The lock-to-disc mode is enabled or disabled by

decoder register E.

2003 Oct 01

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