SAA7824 Datasheet, PDF (46/89 Pages) NXP Semiconductors – CD audio decoder, digital servo and filterless DAC with integrated pre-amp and laser control (PhonIC)

Philips Semiconductors
CD audio decoder, digital servo and filterless
DAC with integrated pre-amp and laser control
Product specification
SAA7824
REGISTER
7
(DAC output
and STATUS pin
control)
ADDRESS
0111
8
(PLL loop filter
bandwidth)
9
(PLL
equalization)
1001
A
(EBU output)
1010
B
(speed control)
1011
C
(versatile pins
interface and
KILL function)
1100
EBU mute
mode (for M1
version only)
DATA
XX00
XX10
X0XX
X1XX
0XXX
1XXX
FUNCTION
interrupt signal from servo only at STATUS
pin
status bit from decoder status register or DC
offset information at STATUS pin [see also
new shadow register C (bank 3)]
DAC data normal value
DAC data inverted value
left channel first at DAC (WCLK normal)
right channel first at DAC (WCLK inverted)
see Table 16
INITIAL⁽¹⁾
reset
−
reset
−
reset
−
−
0011
0001
0010
0100
0101
XX0X
XX1X
X0X0
X0X1
X1X0
X1X1
0XXX
1XXX
X000
X010
X011
00XX
10XX
XXX1
XXX0
XX0X
XX1X
00XX
01XX
0XXX
1XXX
PLL loop filter equalization
PLL 30 ns over-equalization
PLL 15 ns over-equalization
PLL 15 ns under-equalization
PLL 30 ns under-equalization
EBU data before concealment
EBU data after concealment and fade
Level II clock accuracy (<1000 ppm)
Level I clock accuracy (<50 ppm)
Level III clock accuracy (>1000 ppm)
EBU off - output LOW
flags in EBU off
flags in EBU on
standby 1: ‘CD-STOP’ mode
standby 2: ‘CD-PAUSE’ mode
operating mode
single-speed mode
double-speed mode
external off-track signal input at V1
internal off-track signal used (V1 may be
read via status)
stereo KILL
mono KILL
V3 = 0
V3 = 1
mute type = soft mute audio; only available
at 1× speed
mute type = ROM hard mute; available at 1×,
2× and 4× speed
reset
−
−
−
−
−
reset
reset
−
−
−
reset
−
reset
−
−
reset
−
−
reset
−
reset
reset
−
reset
−
2003 Oct 01
46