English
Language : 

SAA7824 Datasheet, PDF (21/89 Pages) NXP Semiconductors – CD audio decoder, digital servo and filterless DAC with integrated pre-amp and laser control (PhonIC)
Philips Semiconductors
CD audio decoder, digital servo and filterless
DAC with integrated pre-amp and laser control
Product specification
SAA7824
7.10.1.2 Loopback external data into onboard DAC
The onboard DAC can also be set to accept serial data
inputs from an external source, e.g. an Electronic Shock
Absorption (ESA) IC. This is known as loopback mode and
is enabled by setting shadow register 7 to 0000. This
enables the serial data output pins (SCLK, WCLK, DATA
and EF) so that data can be routed from the SAA7824 to
an external ESA system (or external DAC).
The serial data from an external ESA IC can then also be
input to the onboard DAC on the SAA7824 by utilising the
serial data input interface (SCLI, SDI and WCLI).
In this mode, a wide range of data formats to the external
ESA IC can be programmed as shown in Table 7.
However, the serial input on the SAA7824 will always
expect the input data from the ESA IC to be 16-bit 1fs and
the same data format, either I2S-bus or EIAJ, as the serial
output format (set by decoder register 3).
The SAA7824 is compatible with a wide range of external
DACs. Eleven formats are supported and are given in
Table 7. Figures 14 and 15 show the Philips I2S-bus and
the EIAJ data formats respectively. When the decoder is
operated in lock-to-disc mode, the SCLK frequency is
dependent on the disc speed factor ‘d’.
All formats are MSB first and 1fs is 44.1 kHz. The polarity
of the WCLK and the data can be inverted; selectable by
decoder register 7. It should be noted that EF is only a
defined output in CD-ROM and 1fs modes.
When using an external DAC (or when using the onboard
DAC in non-loopback mode), the serial data inputs to the
onboard DAC (SCLI, SDI and WCLI) should be tied to
ground.
7.10.2 EXTERNAL DAC INTERFACE
Audio data from the SAA7824 can be sent to an external
DAC, identical to the SAA732x series, in ‘loopback’ mode
(i.e. shadow register 7 is set to 0000).
Table 7 DAC interface formats
REGISTER 3
1010
1011
1110
0010
0110
0000
0100
1100
0011
0111
1111
SAMPLE
FREQUENCY
fs
fs
fs
fs
fs
4fs
4fs
4fs
2fs
2fs
2fs
NUMBER OF
BITS
16
16
16/18(1)
16
18
16
18
18
16
18
18
SCLK (MHz)
2.1168 × n
2.1168 × n
2.1168 × n
2.1168 × n
2.1168 × n
8.4672 × n
8.4672 × n
8.4672 × n
4.2336 × n
4.2336 × n
4.2336 × n
FORMAT
INTERPOLATION
CD-ROM
no
(I2S-bus)
CD-ROM (EIAJ)
no
Philips I2S-bus
yes
16/18 bits(1)
EIAJ 16 bits
yes
EIAJ 18 bits
yes
EIAJ 16 bits
yes
EIAJ 18 bits
yes
Philips I2S-bus
yes
18 bits
EIAJ 16 bits
yes
EIAJ 18 bits
yes
Philips I2S-bus
yes
18 bits
Note
1. In this mode the first 16 bits contain data, but if any of the fade, attenuate or de-emphasis filter functions are activated
then the first 18 bits contain data.
2003 Oct 01
21