English
Language : 

SAA7824 Datasheet, PDF (77/89 Pages) NXP Semiconductors – CD audio decoder, digital servo and filterless DAC with integrated pre-amp and laser control (PhonIC)
Philips Semiconductors
CD audio decoder, digital servo and filterless
DAC with integrated pre-amp and laser control
Product specification
SAA7824
13 OPERATING CHARACTERISTICS (MICROCONTROLLER INTERFACE TIMING)
VDD = 1.65 to 1.95 V; VSS = 0 V; Tamb = 0 to 70 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
NORMAL MODE
MIN.
MAX.
LOCK-TO-DISC MODE
MIN.
MAX.
UNIT
Microcontroller interface timing (4-wire bus mode; writing to decoder registers 0 to F; reading Q-channel
subcode and decoder status); see Figs.36 and 37; note 1
INPUTS SCL AND RAB
tCL
input clock LOW time
tCH
input clock HIGH time
tr
input rise time
tf
input fall time
READ MODE (CL = 20 pF)
tdRD
delay time RAB to
SDA valid
tPD
propagation delay
SCL to SDA
tdRZ
delay time RAB to
SDA high-impedance
480/n + 20 −
2400/n + 20 −
ns
480/n + 20 −
2400/n + 20 −
ns
−
480/n
−
480/n
ns
−
480/n
−
480/n
ns
−
50
−
50
ns
720/n − 20 960/n + 20 720/n + 20 4800/n + 20
−
50
−
50
ns
WRITE MODE (CL = 20 pF)
tsuD
set-up time SDA to note 2
SCL
thD
tsuCR
hold time SCL to SDA
set-up time SCL to
RAB
tdWZ
delay time SDA to
RAB high-impedance
20 − 720/n −
20 − 720/n −
ns
−
960/n + 20 −
4800/n + 20 ns
240/n + 20 −
1200/n + 20 −
ns
0
−
0
−
ns
Microcontroller interface timing (4-wire bus mode; servo commands); see Figs.36 and 38; note 2
INPUTS SCL AND SILD
tL
input LOW time
tH
input HIGH time
tr
input rise time
tf
input fall time
READ MODE (CL = 20 pF)
tdLD
delay time SILD to
SDA valid
tPD
propagation delay
SCL to SDA
tdLZ
delay time SILD to
SDA high-impedance
tsuCLR
set-up time SCL to
SILD
710
−
710
710
−
710
−
240
−
−
240
−
−
25
−
−
950
−
−
50
−
480
−
480
−
ns
−
ns
240
ns
240
ns
25
ns
950
ns
50
ns
−
ns
2003 Oct 01
77