TDA8376 Datasheet, PDF (6/44 Pages) NXP Semiconductors – I2C-bus controlled PAL/NTSC TV processors

Philips Semiconductors
I²C-bus controlled PAL/NTSC TV processors
Objective specification
TDA8376; TDA8376A
6 PINNING
SYMBOL
DEC_DIG
C_BLK
SCL
SDA
DEC_BG
CHROMA
CVBS/Y
V_P1
CVBS_INT
GND1
PIPO
DEC_FT
CVBS_EXT
RGBIN2
RI2
GI2
BI2
BLKIN
BO
GO
RO
BCLIN
RI1
GI1
BI1
RGBIN1
LUMIN
LUMOUT
BYO
RYO
BYI
RYI
XTAL1
XTAL2
DET
SEC_ref
V_P2
CVBS/TXT
PIN
SDIP52
QFP64
1
11
2
12
3
13
4
14
5
16
6
17
7
18
8
20
9
22
10
23
11
25
12
26
13
27
14
28
15
29
16
30
17
31
18
32
19
34
20
35
21
36
22
37
23
38
24
39
25
40
26
41
27
42
28
43
29
44
30
45
31
46
32
47
33
49
34
51
35
53
36
54
37
55
38
56
DESCRIPTION
decoupling digital supply
black peak hold capacitor
I²C-bus serial clock input
I²C-bus serial data input/output
band gap decoupling
chrominance input (S-VHS)
external CVBS/Y input
main supply voltage (+8 V)
internal CVBS input
ground 1
picture-in-picture output
decoupling filter tuning
external CVBS input
RGB insertion input 2
red input 2
green input 2
blue input 2
black-current input
blue output
green output
red output
beam current limiter input
red input 1
green input 1
blue input 1
RGB insertion input 1
luminance input
luminance output
−(B−Y) signal output
−(R−Y) signal output
−(B−Y) signal input
−(R−Y) signal input
3.58 MHz crystal connection
4.43/3.58 MHz crystal connection
loop filter phase detector
SECAM reference output
horizontal oscillator supply voltage (+8 V)
CVBS/TXT output
1996 Jan 26
6