TDA8376 Datasheet, PDF (16/44 Pages) NXP Semiconductors – I2C-bus controlled PAL/NTSC TV processors

Philips Semiconductors
I²C-bus controlled PAL/NTSC TV processors
Objective specification
TDA8376; TDA8376A
8.2.2 OUTPUT CONTROL BITS
Table 27 Power-on reset
POR
0
1
normal
power-down
MODE
Table 28 Field frequency indication
FSI
0 50 Hz
1 60 Hz
FREQUENCY
Table 29 S-VHS status
STS
0 no signal
1 signal
S-VHS INPUT
Table 30 Phase 1 (ϕ₁) lock indication
SL
0 not locked
1 locked
INDICATION
Table 31 X-ray protection
XPR
0
1
OVERVOLTAGE
no overvoltage detected
overvoltage detected
Table 32 Colour decoder mode
CD2
0
0
0
0
1
1
1
1
CD1
0
0
1
1
0
0
1
1
CD0
STANDARD
0 no colour standard identified
1 NTSC 3.6 MHz
0 PAL 4.4 MHz
1 SECAM
0 NTSC 4.4 MHz
1 PAL 3.6 MHz (pin 33)
0 PAL 3.6 MHz (pin 34)
1 spare
Table 33 Output vertical guard
NDF
0
1
VERTICAL OUTPUT STAGE
OK
failure
Table 34 Indication RGB1 insertion
IN1
RGB INSERTION
0 no (pin 26 LOW)
1 yes (pin 26 HIGH)
Table 35 Indication RGB2 insertion
IN2
RGB INSERTION
0 no (pin 14 LOW)
1 yes (pin 14 HIGH)
Table 36 Output video identification
IFI
VIDEO SIGNAL
0 no video signal identified
1 video signal identified
Table 37 IC version indication
AFA
IC
0 TDA8376
1 TDA8376A
Table 38 Crystal indication SXA and SXB
SXA
0
0
1
1
SXB
0
1
0
1
CRYSTAL
two 3.6 MHz
one 3.6 MHz
one 4.4 MHz
3.6 and 4.4 MHz
1996 Jan 26
16