SAA7715 Datasheet, PDF (6/36 Pages) NXP Semiconductors – Digital Signal Processor

Philips Semiconductors
Digital Signal Processor
Preliminary specification
SAA7715H
7 PINNING
SYMBOL PIN PIN TYPE
IIS_BCK1
1 ipthdt5v
IIS_WS1
2 ipthdt5v
IIS_IN1
3 ipthdt5v
RESERVED1 4 ipthdt5v
IIS_IN4
5 ipthdt5v
IIS_IN2
6 ipthdt5v
RESERVED2 7 ipthdt5v
RESERVED3 8 ipthdt5v
IIS_IN3
9 ipthdt5v
V_SSI2
A0
10 vssi
11 ipthdt5v
SCL
12 iptht5v
SDA
13 iic400kt5v
V_SSI1
V_SSA2
V_DDI1
V_DDA2
DSP_RESET
14 vssis
15 vssco
16 vddi
17 vddco
18 ipthut5v
RTCB
19 ipthdt5v
SHTCB
20 ipthdt5v
V_SSE
CLK_IN
21 vsse
22 iptht5v
V_DDE
SPDIF2
23 vdde
24 apio
SPDIF1
25 apio
TSCAN
26 ipthdt5v
SYSCLK
27 bpt4mthdt5v
IIS_OUT4
28 ops5c
IIS_OUT3
29 ops5c
IIS_OUT2
30 ops5c
IIS_OUT1
31 ops5c
IIS_WS
32 ops5c
IIS_BCK
33 ops5c
VOUTL
34 apio
V_DDA1
VOUTR
35 vddo
36 apio
V_SSA1
VREFDA
37 vsso
38 apio
POM
39 apio
POWERDOWN 40 iptht5v
DESCRIPTION
bit clock signal belonging to data of digital serial inputs 1 to 4
word select signal belonging to data of digital serial inputs 1 to 4
data pin of digital serial input 1
not to be connected externally
data pin of digital serial input 4
data pin of digital serial input 2
not to be connected externally
not to be connected externally
data pin of digital serial input 3
ground supply (core only) (bond out to 2 pads)
slave sub-address I²C-bus selection/serial data input test control block
clock input of I²C-bus
data input/output of I²C-bus
ground supply (core only)
ground supply analog of PLL, WS_PLL, SPDIF input stage
positive supply (core only) (bond out to 2 pads)
positive supply analog of PLL, WS_PLL, SPDIF input stage
general reset of chip (active LOW)
asynchronous reset test control block, connect to ground (internal pull down)
shift clock test control block (internal pull down)
ground supply (peripheral cells only)
system clock input
positive supply (peripheral cells only)
SPDIF2 data input (internally multiplexed with digital serial input 3)
SPDIF1 data input (internally multiplexed with digital serial input 2)
scan control active HIGH (internal pull down)
n × f_s output of SAA7715
data pin of digital serial output 4
data pin of digital serial output 3
data pin of digital serial output 2
data pin of digital serial output 1
word select output belonging to digital serial output 1 to 4
bit clock output belonging to digital serial output 1 to 4
analog left output pin.
FSDAC positive supply voltage (bond out to 2 pads)
analog right output pin
FSDAC ground supply voltage (bond out to 2 pads)
voltage reference pin of FSDAC
power-on mute pin of FSDAC
standby mode of chip
2001 May 07
6