83C576 Datasheet, PDF (39/46 Pages) NXP Semiconductors – 80C51 8-bit microcontroller family 8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators, failure detect circuitry, watchdog timer

Philips Semiconductors
80C51 8-bit microcontroller family
8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators,
failure detect circuitry, watchdog timer
Product specification
83C576/87C576
EPROM CHARACTERISTICS
To put the 87C576 in the parallel EPROM programming mode,
PSEN must be held high during power up, then driven low with reset
active. The 87C576 is programmed by using a modified Quick-Pulse
Programming™ algorithm.
The 87C576 contains two signature bytes that can be read and used
by an EPROM programming system to identify the device. The
signature bytes identify the device as an 87C576 manufactured by
Philips.
Table 3 shows the logic levels for reading the signature byte, and for
programming the program memory, the encryption table, and the
security bits. The circuit configuration and waveforms for quick-pulse
programming are shown in Figures 38 and 39. Figure 40 shows the
circuit configuration for normal program memory verification.
On-Board Programming (OBP)
The On-Board Programming facility consists of a series of internal
hardware resources coupled with internal firmware to facilitate
remote programming of the 87C576 through the serial port.
The OBP function is invoked by having the EA/V_PP pin at the V_PP
voltage level at the time that the part exits reset. The OBP function
only requires that the TxD, RxD, V_SS, V_CC, and V_PP pins be
connected to an external circuit in order to use this feature.
The OBP feature provides for the use of a wide range of baud rates
independent of the oscillator frequency used. It is also adaptable to
a wide range of oscillator frequencies. The OBP facility provides for
both auto-echo and no-echo of received characters. The OBP
feature requires that an initial character, an uppercase U, be sent to
the 87C576 to establish the baud rate to be used.
Once baud rate initialization has been performed, the OBP facility
only accepts Intel Hex records. The record-type field of these hex
records are used to indicate either commands or data for the OBP
facility. The maximum number of data bytes in a record is limited to
16 (decimal). These commands/data are summarized below:
Record Command/Data
Type Function
00
Data record, programs the part with data indicated in
record starting with load address in the record
01
EOF record, no operation
02
Specify timing parameters
– rec length = 3 bytes
– load address = 0000
– 1st byte = timer count for 50µs programming pulse
– 2nd byte = timer count for 10µs delay between pulses
– 3rd byte = 0AH
03
Program security bits
– rec length = 1 byte
– load address = 0000
– 1st byte = sec bit values (xxxx xxB2B1)
04
Display contents of USER EPROM array
– rec length = 00
– load address = 0000
05
Verify security bit status
– rec length = 00
– load address = 0000
Quick-Pulse Programming (Parallel)
The setup for microcontroller quick-pulse programming is shown in
Figure 38. Note that the 87C576 is running with a 4 to 6MHz
oscillator. The reason the oscillator needs to be running is that the
device is executing internal address and program data transfers.
The address of the EPROM location to be programmed is applied to
ports 3 and 2, as shown in Figure 38. The code byte to be
programmed into that location is applied to port 0. RST, PSEN and
pins of ports 2 and 1 specified in Table 3 are held at the ‘Program
Code Data’ levels indicated in Table 3. The ALE/PROG is pulsed
low 25 times as shown in Figure 39.
To program the encryption table, repeat the 25 pulse programming
sequence for addresses 0 through 1FH, using the ‘Pgm Encryption
Table’ levels. Do not forget that after the encryption table is
programmed, verification cycles will produce only encrypted data.
To program the security bits, repeat the 25 pulse programming
sequence using the ‘Pgm Security Bit’ levels. After one security bit is
programmed, further programming of the code memory and
encryption table is disabled. However, the other security bit can still
be programmed.
Note that the EA/V_PP pin must not be allowed to go above the
maximum specified V_PP level for any amount of time. Even a narrow
glitch above that voltage can cause permanent damage to the
device. The V_PP source should be well regulated and free of glitches
and overshoot.
Program Verification
If security bit 2 has not been programmed, the on-chip program
memory can be read out for program verification. The address of the
program memory locations to be read is applied to ports 3 and 2 as
shown in Figure 40. The other pins are held at the ‘Verify Code Data’
levels indicated in Table 3. The contents of the address location will
be emitted on port 0. External pull-ups are required on port 0 for this
operation.
If the encryption table has been programmed, the data presented at
port 0 will be the exclusive NOR of the program byte with one of the
encryption bytes. The user will have to know the encryption table
contents in order to correctly decode the verification data. The
encryption table itself cannot be read out.
Reading the Signature Bytes
The signature bytes are read by the same procedure as a normal
verification of locations 030H and 031H, except that P1.0 and P1.1
need to be pulled to a logic low. The values are:
(030H) = 15H indicates manufactured by Philips
(B6H) = B6H indicates 87C576
Program/Verify Algorithms
Any algorithm in agreement with the conditions listed in Table 3, and
which satisfies the timing specifications, is suitable.
™Trademark phrase of Intel Corporation.
1998 Jun 04
39