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83C576 Datasheet, PDF (31/46 Pages) NXP Semiconductors – 80C51 8-bit microcontroller family 8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators, failure detect circuitry, watchdog timer
Philips Semiconductors
80C51 8-bit microcontroller family
8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators,
failure detect circuitry, watchdog timer
Product specification
83C576/87C576
A/D CONVERTER DC ELECTRICAL CHARACTERISTICS
Tamb = 0°C to +70°C, –40°C to +85°C, and –40°C to +125°C; VCC = 5V ±10%, VSS = 0V
TEST
LIMITS
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX
UNIT
Static Characteristics
R
Resolution
Monotonic with no missing codes
10
Bits
ILe
Integral non-linearity error 2, 5, 8
DLe
Differential non-linearity error2, 3, 4, 7, 8
FSe
Full Scale error 2, 8
OSe
Offset error 2, 6, 8
Dynamic Characteristics
±2
LSB
±1
LSB
±3
LSB
±2
LSB
tADC
Conversion time (including sampling time)
tADS
Sampling tme
Analog Input Characteristics
48tCY
µs
8tCY
µs
AVIN
Analog input voltage
CIA
MCTC
Ct
Analog input capacitance
Channel-to-channel matching7
Crosstalk between inputs of port 17
Power Requirements
0–100kHz
AVSS – 0.2 AVDD + 0.2
V
15
pF
±1
LSB
–60
dB
AVCC/VREF+ Analog supply and reference voltage
AVCC = VCC ± 0.2
4.0
6.0
V
AICC
Analog supply current: operating: (16MHz)
AVCC = 6.0V
1.2
mA
NOTES:
1. The following condition must not be exceeded: VDD – 0.2V < AVDD < VDD + 0.2V.
2. Conditions: AVSS = 0V; AVCC = 4.997V; VCC = 5.0V.
3. The differential non-linearity (DLe) is the difference between the actual step width and the ideal step width. (See Figure 24).
4. The ADC is monotonic; there are no missing codes.
5. The integral non-linearity (ILe) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
appropriate adjustment of gain and offset error. (See Figure 24).
6. The offset error (OSe) is the absolute difference between the straight line which fits the actual transfer curve (after removing gain error), and
a straight line which fits the ideal transfer curve. (See Figure 24).
7. Guaranteed by design.
8. To meet Error Specification, analog input voltage must be less than 1V/ms.
Slew
RateMAX + 4
(AVCCń1023) 1000
(12ńOsc Freq (MHz))
(Vńms)
For 16MHz @ 5.0V slew rate = 1.6V/ms.
1998 Jun 04
31