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TDA8596_15 Datasheet, PDF (33/48 Pages) NXP Semiconductors – I2C-bus controlled 4 ´ 45 W power amplifier with symmetrical inputs | |||
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NXP Semiconductors
TDA8596
I2C-bus controlled 4 à 45 W power ampliï¬er with symmetrical inputs
Table 17. Characteristics â¦continued
Refer to test circuit (see Figure 29) at VP = 14.4 V; RL = 4 â¦; f = 1 kHz; RS = 0 â¦; normal mode; unless otherwise speciï¬ed.
Tested at Tamb = 25 °C; guaranteed for Tamb = â40 °C to +105 °C.
Symbol
Parameter
Conditions
Min
Typ
Max Unit
Vn(o)
noise output voltage ï¬lter 20 Hz to 22 kHz; RS = 1 kâ¦
mute mode
-
19
26
µV
line driver mode
-
22
29
µV
normal mode; Tamb = 25 °C to 105 °C
-
45
65
µV
normal mode; Tamb = â20 °C to 25 °C
-
45
110
µV
Gv
voltage gain
differential in; differential out
normal mode
25.5 26
26.5 dB
line driver mode
15.5 16
16.5 dB
Ri
input resistance
symmetrical input; Ci = 470 nF; see
[5] 44
60
100
kâ¦
Figure 29
αmute
Vo(mute)(RMS)
mute attenuation
RMS mute output
voltage
Vo / Vo(mute); Vi = 50 mV
Vi = 1 V (RMS); ï¬lter 20 Hz to 22 kHz
80
92
-
dB
-
25
-
µV
Bp
power bandwidth
â1 dB
-
20 to -
Hz
20000
[1] Operation above 16 V with a 2 ⦠reactive load can trigger the ampliï¬er protection. The ampliï¬er switches off and will restart after 16 ms
resulting in an âaudio holeâ.
[2] VSTB depends on the current into the STB pin: minimum = (1429 Ã ISTB) + 5.4 V, maximum = (3143 Ã ISTB) + 5.6 V.
[3] The times are speciï¬ed without a leakage current. For a leakage current of 10 µA on the SVR pin, the delta time is speciï¬ed. If the
capacitor value on the SVR pin changes with ±30 %, the speciï¬ed time will also change with ±30 %. The speciï¬ed time includes an ESR
of the capacitor on the SVR pin of up to 15 â¦.
[4] Standard I2C-bus spec: maximum LOW level = 0.3 Ã VDD, minimum HIGH-level = 0.7 Ã VDD. To comply with 5 V and 3.3 V logic the
maximum LOW level is deï¬ned with VDD = 5 V and the minimum HIGH-level with VDD = 3.3 V.
[5] Ri is the total differential input resistance. fâ3dB cut-off frequency is deï¬ned as
2----Ï-----Ã----R----i-1--Ã-----C----i---â---2- = 2----Ï-----Ã----4---4------k---â¦------Ã--1--2---3---5------n---F-----Ã-----0---.--8- = 19 Hz assuming worst-case low input resistance and 20 % spread in Ci.
TDA8596_2
Product data sheet
Rev. 02 â 8 November 2007
© NXP B.V. 2007. All rights reserved.
33 of 48
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