TDA8596_15 Datasheet, PDF (16/48 Pages) NXP Semiconductors – I2C-bus controlled 4 ´ 45 W power amplifier with symmetrical inputs

NXP Semiconductors
TDA8596
I²C-bus controlled 4 × 45 W power amplifier with symmetrical inputs
30
G_v
(dB)
20
001aad174
10
0
145
155
Fig 10. Temperature controlled amplifier gain
165
175
T_j (°C)
7.11 Diagnostics
Diagnostic information can be read via the I²C-bus and it can also be made available on
the DIAG pin or STB pin. The information on the DIAG pin is partly fixed, i.e. power-on
reset occurred and low or high battery events. Through I²C-bus commands selectable
information (i.e. load faults, temperature alarms and clip detection) can be made available.
This information will be directed to the DIAG pin through a logical OR function. In case of
any of the above mentioned failures, the DIAG pin will remain LOW so the microcontroller
is triggered to read out the failure information via the I²C-bus (the DIAG pin can be used
as microcontroller interrupt to minimize I²C-bus traffic). As soon as the failure is removed,
the DIAG pin will be released.
The STB pin can be configured as a second clip detection pin. The clip detection level is
equal for all channels. It is possible to redirect the clip information of all separate channels
to each of the two diagnostic pins DIAG or STB. This option can be used to distinguish
between for instance clipping on the front and rear side channels (i.e. by redirecting the
front channels to one diagnostic output and the rear channels to the second diagnostic
output).
Table 4 shows the diagnostic options for the DIAG pin and STB pin for both I²C-bus and
legacy mode:
Table 4. Diagnostic information per pin for various modes
Diagnostic
information
I²C-bus mode
Pin DIAG
Pin STB
Power-on reset
after power-on reset; no
pin DIAG will remain
LOW until amplifier has
been started
Low battery
yes
no
Clip detection
can be enabled per
channel
can be enabled per
channel
Legacy mode
Pin DIAG
no
yes
yes; fixed level for all
channels on 2 %
TDA8596_2
Product data sheet
Rev. 02 — 8 November 2007
© NXP B.V. 2007. All rights reserved.
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