TDA4857PS Datasheet, PDF (33/56 Pages) NXP Semiconductors – I2C-bus autosync deflection controller for PC monitors

Table 5 List of I²C-bus controlled functions and those accessible by pins; notes 1 and 2
FUNCTION
NAME
BITS
SAD
(HEX)
D7
REGISTER ASSIGNMENT
D6 D5 D4 D3 D2 D1
D0
CONTROL
BIT
RANGE
FUNCTION
TRACKS WITH
Horizontal size
HSIZE 8 00 D7 D6 D5 D4 D3 D2 D1 D0
−
0.1 to 3.6 V
HSMOD
Vertical position
VPOS 7 02 D7 D6 D5 D4 D3 D2 D1 X
VPC ±11.5%
VSMOD
Vertical linearity
balance
VLINBAL 4 03 X D6 D5 D4 D3 # # #
VLC ±2.5% of 100%
vertical size
VSIZE, VOVSCN,
VPOS and VSMOD
Moire cancellation via VMOIRE 3
vertical position
03 # # # # # D2 D1 D0
MOD
0 to 0.08% of
−
vertical amplitude
Horizontal pincushion HPIN
6
04 X X D5 D4 D3 D2 D1 D0
−
0 to 1.44 V
VSIZE, VOVSCN,
VPOS, HSIZE and
HSMOD
Moire cancellation via HMOIRE 5
horizontal position
05 X X X D4 D3 D2 D1 D0
MOD 0 to 0.05% of
−
horizontal period
Horizontal position
HPOS 8 06 D7 D6 D5 D4 D3 D2 D1 D0
−
±13% of horizontal −
period
Vertical linearity
VLIN
4 07 D7 D6 D5 D4 # # # #
VSC −2 to −46%
VSIZE, VOVSCN,
VPOS and VSMOD
EW pin balance
HPINBAL 4
07 # # # # D3 D2 D1 D0 HBC and ±1% of
VSIZE, VOVSCN
ACD horizontal period and VPOS
Vertical size
VSIZE 7 08 D7 D6 D5 D4 D3 D2 D1 X
−
60 to 100%
VSMOD
Horizontal corner
correction
HCOR
5
09 X X X D4 D3 D2 D1 D0
VSC
+6 to −46% of
VSIZE, VOVSCN,
parabola amplitude VPOS, HSIZE and
HSMOD
Horizontal trapezium HTRAP 4
correction
0C D7 D6 D5 D4 # # # #
VPC ±0.33 V
VSIZE, VOVSCN,
VPOS, HSIZE and
HSMOD
Horizontal
parallelogram
HPARAL 4
0C # # # # D3 D2 D1 D0 HPC and ±1% of horizontal VSIZE, VOVSCN
ACD period
and VPOS
Vertical focus
VFOCUS 3 0A D7 D6 D5 # # # # #
−
0 to 25%
VSIZE, VOVSCN
and VPOS
Notes
1. X = don’t care.
2. # = this bit is occupied by another function. If the register is addressed, the bit values for both functions must be transferred.