TDA4857PS Datasheet, PDF (23/56 Pages) NXP Semiconductors – I2C-bus autosync deflection controller for PC monitors

Philips Semiconductors
I²C-bus autosync deflection controller for
PC monitors
Product specification
TDA4857PS
SYMBOL
PARAMETER
CONDITIONS
MIN.
C_BSENS(min)
minimum value of capacitor at
2
BSENS (pin 4)
Internal reference, supply voltage, soft start and protection
V_CC(stab)
I_CC
I_CC(stb)
PSRR
external supply voltage for
9.2
complete stabilization of all
internal references
supply current
−
standby supply current
STDBY = 1; V_PLL2 < 1 V; −
3.5 V < V_CC < 16 V
power supply rejection ratio of f = 1 kHz
50
internal supply voltage
V_CC(blank)
supply voltage level for
activation of continuous
blanking
V_CC decreasing from 12 V 8.2
V_{CC(blank)(min)}
V_on(VCC)
minimum supply voltage level
for function of continuous
blanking
supply voltage level for
activation of HDRV, BDRV,
VOUT1, VOUT2 and
HUNLOCK
V_CC decreasing from 12 V 2.5
V_CC increasing from below 7.9
typical 8 V
V_off(VCC)
supply voltage level for
V_CC decreasing from
7.7
deactivation of BDRV, VOUT1, above typical 8.3 V
VOUT2 and HUNLOCK; also
sets register SOFTST
THRESHOLDS DERIVED FROM HPLL2 VOLTAGE
V_{HPLL2(blank)(ul)} upper limit voltage for
−
continuous blanking
V_{HPLL2(bduty)(ul)} upper limit voltage for variation
−
of BDRV duty cycle
V_{HPLL2(bduty)(ll)}
lower limit voltage for variation
−
of BDRV duty cycle
V_{HPLL2(hduty)(ul)} upper limit voltage for variation
−
of HDRV duty cycle
V_{HPLL2(hduty)(ll)}
lower limit voltage for variation
−
of HDRV duty cycle
V_{HPLL2(stby)(ll)}
lower limit voltage for VOUT1
−
and VOUT2 to be active via
I²C-bus soft start
V_{HPLL2(stby)(ul)}
upper limit voltage for standby
−
voltage
V_{HPLL2(stby)(ll)}
lower limit voltage for VOUT1
−
and VOUT2 to be active via
external DC current
TYP.
−
−
70
9
−
8.6
3.5
8.3
8.1
4.7
3.4
2.8
2.8
1.7
1.1
1
0
MAX. UNIT
−
nF
16
V
−
mA
−
mA
−
dB
9.0
V
4.0
V
8.7
V
8.5
V
−
V
−
V
−
V
−
V
−
V
−
V
−
V
−
V
2000 Jan 31
23