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TDA4857PS Datasheet, PDF (18/56 Pages) NXP Semiconductors – I2C-bus autosync deflection controller for PC monitors
Philips Semiconductors
I2C-bus autosync deflection controller for
PC monitors
Product specification
TDA4857PS
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
AUTOMATIC VARIATION OF DUTY CYCLE; see Fig.14
tHDRV(OFF)/tH
relative tOFF time of HDRV
output; measured at
VHDRV = 3 V; HDRV duty cycle
is modulated by the relation
IHREF/IVREF
IHDRV = 20 mA;
fH = 31.45 kHz
IHDRV = 20 mA;
fH = 58 kHz
IHDRV = 20 mA;
fH = 110 kHz
42
45
48
%
45.5 48.5 51.5 %
49
52
55
%
X-ray protection: pins XRAY and XSEL
VXRAY(sl)
tW(XRAY)(min)
Ri(XRAY)
slicing voltage level for latch
minimum width of trigger pulse
input resistance at pin 2
VXRAY < 6.38 V + VBE
VXRAY > 6.38 V + VBE
standby mode
6.22 6.39 6.56 V
−
−
30
µs
500
−
−
kΩ
−
5
−
kΩ
−
5
−
kΩ
XRAYrst
reset of X-ray latch
pin 9 open-circuit or
connected to GND
set control bit SOFTST via −
the I2C-bus
pin 9 connected to VCC via switch off VCC then
−
RXSEL
re-apply VCC
VCC(XRAY)(min)
minimum supply voltage for pin 9 connected to VCC via −
−
4
V
correct function of the X-ray RXSEL
latch
VCC(XRAY)(max)
maximum supply voltage for pin 9 connected to VCC via 2
−
reset of the X-ray latch
RXSEL
RXSEL
external resistor at pin 9
no reset via I2C-bus
56
−
−
V
130
kΩ
Vertical oscillator [oscillator frequency in application without adjustment of free-running frequency ffr(V)]
ffr(V)
free-running frequency
RVREF = 22 kΩ;
40
42
43.3 Hz
CVCAP = 100 nF
fcr(V)
vertical frequency catching
constant amplitude; note 7 50
−
160
Hz
range
VVREF
voltage at reference input for
vertical oscillator
−
3.0
−
V
td(scan)
delay between trigger pulse
and start of ramp at VCAP
(pin 24) (width of vertical
blanking pulse)
control bit VBLK = 0
control bit VBLK = 1
220
260
300
µs
305
350
395
µs
IVAGC
amplitude control current
control bit AGCDIS = 0
control bit AGCDIS = 1
±120 ±200 ±300 µA
−
0
−
µA
CVAGC
external capacitor at VAGC
(pin 22)
150
−
220
nF
2000 Jan 31
18