TDA8031 Datasheet, PDF (31/57 Pages) NXP Semiconductors – USB smart card reader (OTP or ROM)

Philips Semiconductors
USB smart card reader (OTP or ROM)
Product specification
TDA8030; TDA8031
8.3 ISO7816 SECURITY
8.3.1 INTRODUCTION
The correct sequence during activation and deactivation of
the cards is ensured through a specific sequencer, clocked
by a division ratio of the internal oscillator.
Activation (START bit HIGH in the Power Control Register)
is only possible if the card is present (PRES active HIGH)
and if the supply voltage is correct (supervisor not active).
The presence of the card is signalled to the microcontroller
by the Hardware Status Register (HSR).
Bit PRL in the HSR is set if the card is present. Bit PRL in
the HSR is set if bit PRL has toggled.
During a session, the sequencer performs an automatic
emergency deactivation on the card in the event of card
take off, a short-circuit, a supply drop-out or overheating.
When the HSR register is updated and the INT0 line goes
LOW, the microcontroller will also be updated.
8.3.2 PROTECTIONS AND LIMITATIONS
The TDA8030; TDA8031 features the following protections
and limitations:
1. I_CC limited to 100 mA, deactivated when this limit is
reached
2. Current to and from RST is limited to 20 mA,
deactivated when this limit is reached
3. Deactivation when the temperature of the die exceeds
150 °C
4. Current to and from the I/O is limited to 10 mA
5. Current to and from pin CLK is limited to 70 mA (not in
current reduction modes, when clock is stopped)
6. ESD protection on all cards contacts + PRES at
6 kV (min.), thus no need of extra components for
protection against ESD flash caused by a charged
card being introduced in the slot
7. Short-circuit between any cards contacts can last any
duration without any damage.
8.3.3 ACTIVATION SEQUENCE
When the card is inactive, V_CC, CLK, RST, I/O, C4 and C8
are LOW, with low-impedance with referenced to CGND.
The DC-to-DC converter is stopped.
When everything is in normal conditions (no error flag set),
the microcontroller will initiate an activation sequence of
the card.
After leaving the UART reset mode and then configuring
the necessary parameters for the UART, the START bit in
the PCR (t₀) will be activated. The following sequence then
occurs:
1. The DC-to-DC converter is started (t₁)
2. V_CC starts rising from 0 to 5 V or 3 or 1.8 V with a
controlled rise time of 0.17 V/µs typically (t₂)
3. I/O, C4 and C8 rise to V_CC (t₃); integrated 10 kΩ
pull-up resistors connected to V_CC
4. Clock pulses are sent to the card and RST is enabled
(t₄).
After a number of clock pulses that can be counted with the
Time-Out Counter, the bit RSTIN may be set by software
and RST will rise to V_CC.
The sequencer is clocked by ¹â„₆₄f_int which leads to a time
interval of t = 25 µs typical.
Thus t₁ = 0 to ³â„₆₄t, t₂ = t₁ + ⁵⁄₂t, t₃ = t₁ + ⁹⁄₂t
and t₄ = t₁ + 5t.
2003 Jul 04
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