PHT2NQ10T Datasheet, PDF (3/12 Pages) NXP Semiconductors – N-channel TrenchMOS transistor

Philips Semiconductors
PHT2NQ10T
N-channel TrenchMOS transistor
120
P_der
(%)
80
03aa17
120
I_der
(%)
80
03aa25
40
40
0
0
50
100
P_der
=
-------^P----^t--^o--^t-------
P
×
100
%
t o t ( 25 ^°C )
150
200
T_sp (^oC)
Fig 1. Normalized total power dissipation as a
function of solder point temperature.
0
0
50
100
150
200
T_sp (^oC)
V_GS ≥ 10 V
I_der = -_I------^I---^D-------- × 100%
D ( 25 ^°C )
Fig 2. Normalized continuous drain current as a
function of solder point temperature.
102
I_D
(A)
10
R_DSon = V_DS/ I_D
1
10-1
10-2
1
DC
10
03ag27
t_p = 10 µs
100 µs
1 ms
10 ms
100 ms
102
103
V_DS (V)
10
I_AS
(A)
1
03ag34
25 ºC
T_j prior to avalanche = 125 ºC
10-1
10-2
10-1
1
10
t_p (ms)
T_sp = 25 °C; I_DM is single pulse.
Fig 3. Safe operating area; continuous and peak drain
currents as a function of drain-source voltage.
Unclamped inductive load; V_DD ≤ 15 V; R_GS = 50 Ω;
V_GS = 10 V; starting T_j = 25 °C and 125 °C.
Fig 4. Non-repetitive avalanche ruggedness current
as a function of pulse duration.
9397 750 08918
Product data
Rev. 01 — 16 October 2001
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
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