PHP112N06T Datasheet, PDF (3/14 Pages) NXP Semiconductors – N-channel enhancement mode field-effect transistor

Philips Semiconductors
PHP112N06T; PHB112N06T
N-channel enhancement mode field-effect transistor
120
Pder
(%)
100
03aa16
80
60
40
20
0
0 25 50 75 100 125 150 175 200
Tmb (oC)
P_der
=
-------^P----^t--^o--^t-------
P
×
100
%
t o t ( 25 ^°C )
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
120
Ider
(%)
100
03aa24
80
60
40
20
0
0 25 50 75 100 125 150 175 200
Tmb (oC)
V_GS ≥ 10 V
I_der = -_I------^I---^D-------- × 100%
D ( 25 ^°C )
Fig 2. Normalized continuous drain current as a
function of mounting base temperature.
103
ID
(A)
RDSon = VDS / ID
102
10
P
δ
=
tp
T
DC
003aaa069
tp =
1 µs
10 µs
100 µs
1 ms
10 ms
0.1 s
102
IAS
(A)
003aaa080
25 ^oC
10
Tj prior to avalanche = 150 ^oC
tp
1
T
1
t
10
VDS (V) ¹⁰²
1
10-3
10-2
10-1
1
10
tp ms
T_mb = 25 °C; I_DM is single pulse.
Fig 3. Safe operating area; continuous and peak drain
currents as a function of drain-source voltage.
Unclamped inductive load; V_DD ≤ 15 V; R_GS = 50 Ω;
V_GS = 5 V; starting T_j = 25 °C and 150 °C.
Fig 4. Non-repetitive avalanche ruggedness current
as a function of pulse duration.
9397 750 08108
Product specification
Rev. 01 — 07 March 2001
© Philips Electronics N.V. 2001. All rights reserved.
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