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80C575 Datasheet, PDF (22/40 Pages) NXP Semiconductors – 80C51 8-bit microcontroller family 8K/256 OTP/ROM/ROMless, 4 comparator, failure detect circuitry, watchdog timer
Philips Semiconductors
80C51 8-bit microcontroller family
8K/256 OTP/ROM/ROMless, 4 comparator, failure detect circuitry, watchdog timer
Product specification
80C575/83C575/
87C575
D0
D1
D2
D3
D4
D5
D6
D7
D8
SM0
SM1
SM2
REN
TB8
RB8
TI
1
1
1
0
1
1
X
RI
SCON
(98H)
RECEIVED ADDRESS D0 TO D7
PROGRAMMED ADDRESS
COMPARATOR
IN UART MODE 2 OR MODE 3 AND SM2 = 1:
INTERRUPT IF REN=1, RB8=1 AND “RECEIVED ADDRESS” = “PROGRAMMED ADDRESS”
– WHEN OWN ADDRESS RECEIVED, CLEAR SM2 TO RECEIVE DATA BYTES
– WHEN ALL DATA BYTES HAVE BEEN RECEIVED: SET SM2 TO WAIT FOR NEXT ADDRESS.
Figure 20. UART Multiprocessor Communication, Automatic Address Recognition
SU00045
CMP Register Bit Definitions
CMP.7 enable comparator 3,
disable pullups at P3.4, P3.7
CMP.6 enable comparator 2,
disable pullups at P3.4, P3.6
CMP.5 enable comparator 1,
disable pullups at P3.4, P3.5
CMP.4 enable comparator 0,
disable pullups at P1.0, P1.1
CMP.3 comparator 3 output (read only)
CMP.2 comparator 2 output (read only)
CMP.1 comparator 1 output (read only)
CMP.0 comparator 0 output (read only)
All comparators are disabled automatically in
power down mode, in idle mode unused
comparators should be disabled by software
to save power. A comparator can generate
an interrupt that will terminate idle mode.
The CMPE register contains bits to enable
each comparator to drive external output pins
or internal PCA capture inputs. Pullups at the
output pins are disabled by hardware when
the external comparator output is enabled.
The comparator output is wire-ORed with the
corresponding port SFR bit, so the SFR bit
must also be set by software to enable the
output.
CMPE Register Bit Definitions
CMPE.7 enables comparator 3 to drive
CEX3
CMPE.6 enables comparator 2 to drive
CEX2
CMPE.5 enables comparator 1 to drive
CEX1
CMPE.4 enables comparator 0 to drive
CEX0
CMPE.3 enables comparator 3 output on
P1.6 (open drain)
CMPE.2 enables comparator 2 output on
P1.5 (open drain)
CMPE.1 enables comparator 1 output on
P1.4 (open drain)
CMPE.0 enables comparator 0 output on
P1.3 (open drain)
When 1s are written to CMPE bits 7-4,
the comparator outputs will drive the
corresponding capture input. (This function is
not available in the idle or power-down
mode.) When 1s are written to CMPE bits 3-0
the comparator output will also drive the
corresponding port 1 pin. (This function is
available in idle mode.) If the comparator’s
enabled to drive the capture input but not the
port pin, then the port pin can be used for
general purpose I/O. When a comparator
output is enabled, pullups at the output pin
are disabled and the output becomes open
drain. The comparator output can be used to
trigger a capture input in idle mode by
programming the CMPE register to drive the
pin from the comparator output to have the
pin supply the capture trigger.
There are two special function registers
associated with the comparators. They are
CMP which contains the comparator enables
and a bit that can be read by software to
determine the state of each comparator’s
output, and CMPE which controls whether
the output from each comparator drives the
associated output pin or a capture input
associated with one of the PCA modules.
The CMP registers bits 0–3 can be read by
software to determine the state of the output
of each comparator. To do this the associated
comparator must be enabled but the output in
port 1 can be disabled. This allows easy
polling of the comparator output value without
the need to use up a port pin.
The CMPE register allows the comparator to
drive the associated PCA module capture
input, so that on compare a capture can be
generated in the PCA. Bits 0–3 of this
register enable the comparator output to drive
the associated port 1 output circuitry. Used
as a comparator output this circuitry is open
drain. To enable the comparator output to
drive to port 1, the corresponding port bit
must also be set to disable the pulldown. If
the comparator is not enabled to drive the
port 1 circuitry, the associated port 1 pin can
be used for other I/O. This includes when a
comparator is enabled to drive the capture
input to a PCA module.
1998 May 01
22