80C575 Datasheet, PDF (10/40 Pages) NXP Semiconductors – 80C51 8-bit microcontroller family 8K/256 OTP/ROM/ROMless, 4 comparator, failure detect circuitry, watchdog timer

Philips Semiconductors
80C51 8-bit microcontroller family
8K/256 OTP/ROM/ROMless, 4 comparator, failure detect circuitry, watchdog timer
Product specification
80C575/83C575/
87C575
PROGRAMMABLE COUNTER
ARRAY (PCA)
The Programmable Counter Array is a
special Timer that has five 16-bit
capture/compare modules associated with it.
Each of the modules can be programmed to
operate in one of four modes: rising and/or
falling edge capture, software timer,
high-speed output, or pulse width modulator.
Each module has a pin associated with it in
port 1. Module 0 is connected to P1.3(CEX0),
module 1 to P1.4(CEX1), etc.. The basic
PCA configuration is shown in Figure 2.
The PCA timer is a common time base for all
five modules and can be programmed to run
at: 1/12 the oscillator frequency, 1/4 the
oscillator frequency, the Timer 0 overflow, or
the input on the ECI pin (P1.2). The timer
count source is determined from the CPS1
and CPS0 bits in the CMOD SFR as follows
(see Figure 3):
CPS1 CPS0 PCA Timer Count Source
0
0 1/12 oscillator frequency
0
1 1/4 oscillator frequency
1
0 Timer 0 overflow
1
1 External Input at ECI pin
In the CMOD SFR are three additional bits
associated with the PCA. They are CIDL
which allows the PCA to stop during idle
mode, WDTE which enables or disables the
watchdog function on module 4, and ECF
which when set causes an interrupt and the
PCA overflow flag CF (in the CCON SFR) to
be set when the PCA timer overflows. These
functions are shown in Figure 3.
The watchdog timer function is implemented
in module 4 as implemented in other parts
that have a PCA that are available on the
market. However, if a watchdog timer is
required in the target application, it is
recommended to use the hardware watchdog
timer that is implemented on the 87C575
separately from the PCA (see Figure 14).
The CCON SFR contains the run control bit
for the PCA and the flags for the PCA timer
(CF) and each module (refer to Figure 6). To
run the PCA the CR bit (CCON.6) must be
set by software. The PCA is shut off by
clearing this bit. The CF bit (CCON.7) is set
when the PCA counter overflows and an
interrupt will be generated if the ECF bit in
the CMOD register is set, The CF bit can only
be cleared by software. Bits 0 through 4 of
the CCON register are the flags for the
modules (bit 0 for module 0, bit 1 for module
1, etc.) and are set by hardware when either
a match or a capture occurs. These flags
also can only be cleared by software. The
PCA interrupt system shown in Figure 4.
Each module in the PCA has a special
function register associated with it. These
registers are: CCAPM0 for module 0,
CCAPM1 for module 1, etc. (see Figure 7).
The registers contain the bits that control the
mode that each module will operate in. The
ECCF bit (CCAPMn.0 where n=0, 1, 2, 3, or
4 depending on the module) enables the CCF
flag in the CCON SFR to generate an
interrupt when a match or compare occurs in
the associated module. PWM (CCAPMn.1)
enables the pulse width modulation mode.
The TOG bit (CCAPMn.2) when set causes
the CEX output associated with the module to
toggle when there is a match between the
PCA counter and the module’s
capture/compare register. The match bit MAT
(CCAPMn.3) when set will cause the CCFn
bit in the CCON register to be set when there
is a match between the PCA counter and the
module’s capture/compare register.
The next two bits CAPN (CCAPMn.4) and
CAPP (CCAPMn.5) determine the edge that
a capture input will be active on. The CAPN
bit enables the negative edge, and the CAPP
bit enables the positive edge. If both bits are
set both edges will be enabled and a capture
will occur for either transition. The last bit in
the register ECOM (CCAPMn.6) when set
enables the comparator function. Figure 8
shows the CCAPMn settings for the various
PCA functions.
There are two additional registers associated
with each of the PCA modules. They are
CCAPnH and CCAPnL and these are the
registers that store the 16-bit count when a
capture occurs or a compare should occur.
When a module is used in the PWM mode
these registers are used to control the duty
cycle of the output.
PCA Capture Mode
To use one of the PCA modules in the
capture mode either one or both of the
CCAPM bits CAPN and CAPP for that
module must be set. The external CEX input
for the module (on port 1) is sampled for a
transition. When a valid transition occurs the
PCA hardware loads the value of the PCA
counter registers (CH and CL) into the
module’s capture registers (CCAPnL and
CCAPnH). If the CCFn bit for the module in
the CCON SFR and the ECCFn bit in the
CCAPMn SFR are set then an interrupt will
be generated. Refer to Figure 9.
16-bit Software Timer Mode
The PCA modules can be used as software
timers by setting both the ECOM and MAT
bits in the modules CCAPMn register. The
PCA timer will be compared to the module’s
capture registers and when a match occurs
an interrupt will occur if the CCFn (CCON
SFR) and the ECCFn (CCAPMn SFR) bits for
the module are both set (see Figure 10).
High Speed Output Mode
In this mode the CEX output (on port 1)
associated with the PCA module will toggle
each time a match occurs between the PCA
counter and the module’s capture registers.
To activate this mode the TOG, MAT, and
ECOM bits in the module’s CCAPMn SFR
must be set (see Figure 11).
16 BITS
MODULE 0
P1.3/CEX0
16 BITS
MODULE 1
P1.4/CEX1
PCA TIMER/COUNTER
MODULE 2
P1.5/CEX2
TIME BASE FOR PCA MODULES
MODULE FUNCTIONS:
16-BIT CAPTURE
16-BIT TIMER
16-BIT HIGH SPEED OUTPUT
8-BIT PWM
WATCHDOG TIMER (MODULE 4 ONLY)
MODULE 3
MODULE 4
Figure 2. Programmable Counter Array (PCA)
P1.6/CEX3
P1.7/CEX4
SU00032
1998 May 01
10