80C575 Datasheet, PDF (2/40 Pages) NXP Semiconductors – 80C51 8-bit microcontroller family 8K/256 OTP/ROM/ROMless, 4 comparator, failure detect circuitry, watchdog timer

Philips Semiconductors
80C51 8-bit microcontroller family
8K/256 OTP/ROM/ROMless, 4 comparator, failure detect circuitry, watchdog timer
Product specification
80C575/83C575/
87C575
DESCRIPTION
The Philips 80C575/83C575/87C575 is a
high-performance microcontroller fabricated
with Philips high-density CMOS technology.
The Philips CMOS technology combines the
high speed and density characteristics of
HMOS with the low power attributes of
CMOS. Philips epitaxial substrate minimizes
latch-up sensitivity.
The 8XC575 contains an 8k × 8 ROM
(83C575) EPROM (87C575), a 256 × 8 RAM,
32 I/O lines, three 16-bit counter/timers, a
Programmable Counter Array (PCA), a
seven-source, two-priority level nested
interrupt structure, an enhanced UART, four
analog comparators, power-fail detect and
oscillator fail detect circuits, and on-chip
oscillator and clock circuits.
In addition, the 8XC575 has a low active
reset, and the port pins are reset to a low
level. There is also a fully configurable
watchdog timer, and internal power on clear
circuit. The part includes idle mode and
power-down mode states for reduced power
consumption.
FEATURES
• 80C51 based architecture
– 8k × 8 ROM (83C575)
– 8k × 8 EPROM (87C575)
– ROMless (80C575)
– 256 × 8 RAM
– Three 16-bit counter/timers
– Programmable Counter Array
– Enhanced UART
– Boolean processor
– Oscillator fail detect
– Low active reset
– Asynchronous low port reset
– Schmitt trigger inputs
– 4 analog comparators
– Watchdog timer
– Low V_CC detect
• Memory addressing capability
– 64k ROM and 64k RAM
• Power control modes:
– Idle mode
– Power-down mode
• CMOS and TTL compatible
• 4.0 to 16MHz
• Extended temperature ranges
• OTP package available
PIN CONFIGURATIONS
CMP0+/P1.0/T2 1
CMP0-/P1.1/T2EX 2
40 _VDD
39 P0.0/AD0
ECI/P1.2 3
38 P0.1/AD1
CMP0/CEX0/P1.3 4
37 P0.2/AD2
CMP1/CEX1/P1.4 5
36 P0.3/AD3
CMP2/CEX2/P1.5 6
35 P0.4/AD4
CMP3/CEX3/P1.6 7
34 P0.5/AD5
CEX4/P1.7 8
33 P0.6/AD6
RST 9
32 P0.7/AD7
RxD/P3.0 10
TxD/P3.1 11
INT0/P3.2 12
DUAL
IN-LINE
PACKAGE
31 _EA/VPP
30 ALE/PROG
29 PSEN
INT1/P3.3 13
28 P2.7/A15
CMPR-/T0/P3.4 14
27 P2.6/A14
CMP1+/T1/P3.5 15
26 P2.5/A13
CMP2+/WR/P3.6 16
25 P2.4/A12
CMP3+/RD/P3.7 17
24 P2.3/A11
XTAL2 18
23 P2.2/A10
XTAL1 19
22 P2.1/A9
V_SS 20
21 P2.0/A8
6 1 40
7
39 ₁
17
LCC
29 ¹¹
18
28
44
34
33
PQFP
23
12
22
SU00234
ORDERING INFORMATION
ROMless
ROM
EPROM¹
P80C575EBP N P83C575EBP N P87C575EBPN
P80C575EBA A P83C575EBA A P87C575EBAA
P80C575EHAA P83C575EHAA P87C575EHAA
P80C575EBB B P83C575EBB B P87C575EBBB
NOTE:
1. OTP - One Time Programmable EPROM.
OTP
OTP
OTP
OTP
TEMPERATURE RANGE °C AND PACKAGE
0 to +70, 40-Pin Plastic Dual In-line Package
0 to +70, 44-Pin Plastic Leaded Chip Carrier
–40 to +125, 44-Pin Plastic Leaded Chip Carrier
0 to +70, 44-Pin Plastic Quad Flat Pack
FREQ DRAWING
(MHz) NUMBER
16 SOT129-1
16 SOT187-2
16 SOT187-2
16 SOT307-2
1998 May 01
2
853-1684 19332