SAA4992H Datasheet, PDF (18/36 Pages) NXP Semiconductors – Field and line rate converter with noise reduction

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NAME
WEbdREceShift
WEbdShift
REceShift
POR
Mode control
Control1
EstMode
FilmMode
UpcMode
MatrixOn
EmbraceOn
MemComp
MemDecom
SNERT
ADDRESS
HEX
READ/
WRITE⁽¹⁾
7
6
5
4
3
2
1
0
DESCRIPTION⁽²⁾
024
write; S
X X X shift of WEb and WEd signal in number of pixels
(0, +1, +2, +3, −4, −3, −2 or −1)
XXX
shift of REc and REe signal in number of pixels
(0, +1, +2, +3, −4, −3, −2 or −1)
025
write; S
X power-on reset command, to be set high temporarily during start-up
(normal or reset); note 3
026
write; F
X Set estimator mode; 0 = line alternating use of left and right estimator:
use in progressive scan except with vertical compress. 1 = field
alternating use of left and right estimator: use in field doubling and
progressive scan with vertical compress.
X set film mode; 0 = video camera mode; 1 = film mode
XX
select upconversion quality; 00 = full, 01 = economy (DPCM),
10 = SAA4991WP, 11 = SAA4990H
X
set matrix output mode; 1 = double output, disabling vertical peaking;
0 = normal single output mode
X
Master enable for embrace mode (off or on); SwapMpr in control2
should be at ‘swap’ position to really cross-switch FM1 and FM3 field
outputs. Should be set to logic 0 except in film mode and FM3 is
present, or in SAA4991WP film mode and MemComp bit is active.
X
set memory compression (luminance DPCM) (off or on)
X
set memory decompression (luminance DPCM) (off or on)