TDA8594_15 Datasheet, PDF (11/49 Pages) NXP Semiconductors – I2C-bus controlled 4  50 W power amplifier

NXP Semiconductors
TDA8594
I²C-bus controlled 4  50 W power amplifier
V_P
DIAG
on
STB mute
standby
SVR
amplifier
output
t_{amp_on}
soft
mute
t_off
fast
mute
t_{d(mute_off)}
t_{d(soft_mute)} t_{d(mute_on)}
Fig 6. Start-up and shut-down timing in legacy mode
t_{d(fast_mute)}
001aad 171
7.9 Power-on reset and supply voltage spikes
If in I²C-bus mode the supply voltage drops below 5 V (see Figure 9), the content of the
I²C-bus latches cannot be guaranteed and the power-on reset will be activated. All latches
are reset, the amplifier is switched off and the DIAG pin is pulled LOW to indicate that a
power-on reset has occurred (bit DB2[D7]). When IB1[D0] is set, the power-on flag is
reset, the DIAG pin will be released and the amplifier will start up.
In legacy mode a supply voltage drop below 5 V will switch off the amplifier and the DIAG
pin will not be pulled LOW.
7.10 Engine start and low voltage operation
The DC output voltage of the amplifier (V_O) is set to half of the supply voltage and is
related to the voltage on the SVR pin (see Figure 7; V_O = V_SVR  1.4 V). A capacitor is
connected on the SVR pin to suppress the ripple on the power supply.
If the supply voltage drops, for instance, during an engine start, the output follows slowly
due to the SVR capacitor. The headroom voltage is the voltage needed for good operation
of the amplifier and is defined as V_hr = V_P  V_O (see Figure 7). If the headroom voltage
becomes lower than the headroom protection threshold of 1.6 V, the headroom protection
is activated to prevent pop noise at the output. This protection first activates the fast mute
and then discharges the capacitors on the SVR and ACGND pins to generate more
headroom for the amplifier (see Figure 8).
TDA8594
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 11 June 2013
© NXP B.V. 2013. All rights reserved.
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