MN5572 Datasheet, PDF (6/28 Pages) Panasonic Semiconductor – Gray Scale Font Engine

MN5572
I Pin Descriptions (continued)
2. Local 16 mode pin descriptions (continued)
Pin Name
I/O
Description
P1TCPOUT
O Testing
P2TCPOUT
O Testing
MIN5
I 5 V voltage reference
P1VDD
I Internal frequency multiplier PLL power supply (3.3 V)
P2VDD
I External phase compensation PLL power supply (3.3 V)
VDD
I Power supply (3.3 V)
P1VSS
 Ground
P2VSS
 Ground
VSS
 Ground
3. PCI mode pin descriptions
Pin Name
I/O
ICLOCK
I
PCICLK
I
NRST
I
NCBE[3 : 0]
I
NFRAME
I
NIRDY
I
IDSEL
I
AD[31 : 16]
I/O
AD[15 : 0]
I/O
NDEVSEL
O
NTRDY
O
PAR
I/O
NSTOP
O
NSERR
O
NPERR
O
IFCFG
I
BUSSEL
I
CLKSEL[2 : 0]
I
PLNRESET
I
P1NPWD
I
P1SEL[2 : 1]
I
P2NPWD
I
OCLOCK
O
Description
Internal operating clock input
PCI interface clock input
Hardware reset (active low)
PCI command/byte enable (active low)
PCI cycle frame (active low)
PCI initiator ready (active low)
PCI initialization device select
PCI address/data I/O (upper 16 bits)
PCI address/data I/O (lower 16 bits)
PCI target device select (active low)
PCI target ready (active low)
PCI parity I/O
PCI stop (active low)
PCI system error
PCI parity error
Interface mode setting (connect high)
Data bus width setting (connect high)
Internal/external clock select
Internal PLL reset (active low)
Low power mode control for internal frequency multiplier PLL (active low)
Frequency selector for internal frequency multiplier PLL
Low power mode control for external phase compensation PLL (active low)
Unused
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SDF00008BEM