MN5572 Datasheet, PDF (24/28 Pages) Panasonic Semiconductor – Gray Scale Font Engine

MN5572
I Electrical Characteristics (continued)
3. DC Characteristics
at V_DD = 3.0 V to 3.6 V, V_REF5 = 4.75 V to 5.25 V, V_SS = 0.00 V, f_TEST = 66 MHz, T_a = 0°C to +70°C
Parameter
Symbol
Conditions
Min
Typ
Max Unit
Quiescent supply current
I_DDS V_I (pull up)= OPEN

V_I (pull down) = OPEN
Either the V_DD or the V_SS
level must be applied to all
other input pins and I/O pins
in the high-impedance state.

200
µA
5 V reference supply (VREF5) I_REF
input leakage current


±20
µA
Operating supply current
I_DDO V_I = V_DD or V_SS

f = 66 MHz
V_DD = 3.3 V, outputs open
90
180 mA
CMOS level inputs with built-in pull-down resistors: MINTEST
High-level input voltage
Low-level input voltage
Pull-down resistor
Input leakage current
V_IH
V_IL
R_IL
V_I = V_DD
I_LIL
V_I = V_SS
V_DD × 0.7 
V_DD
V
0
 V_DD × 0.3 V
10
30
90
kΩ


±10
µA
LVTTL level inputs with built-in pull-down resistors: PLTEST
High-level input voltage
V_IH
2.0

V_DD
V
Low-level input voltage
V_IL
0

0.8
V
Pull-down resistor
R_IL
V_I = V_DD
10
30
90
kΩ
Input leakage current
I_LIL
V_I = V_SS


±10
µA
TTL level inputs: _{P1NPWD, P2NPWD, NCBE0 to NCBE3, NRST, IDSEL, IFCFG, NIRDY, P1SEL1, P1SEL2,}
BUSSEL, CAPTON, CLKSEL0 to CLKSEL2, ICLOCK, NFRAME, PCICLK, TESTON,
PLTPDIN, ^PLNRESET
High-level input voltage
Low-level input voltage
Input leakage current
V_IH
V_IL
I_LI
V_I = 5.25 V or V_SS
2.0

5.25
V
0

0.8
V


±10
µA
Push-pull outputs : OCLOCK
High-level output voltage
Low-level output voltage
V_OH I_OH = −4.0 mA
V_I = V_DD or V_SS
V_OL I_OL = 4.0 mA
V_I = V_DD or V_SS
V_DD− 0.6 

V


0.4
V
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