MN5572 Datasheet, PDF (17/28 Pages) Panasonic Semiconductor – Gray Scale Font Engine

MN5572
I Operation
1. Pin settings (continued)
1. 3. Frequency multiplier circuit settings (contined)
• When the clock setting pins CLKSEL[1:0] are 01 (Duty compensated clock setting)
Pin Name
PLNRESET
ICLOCK
P1NPWD
P1SEL[2 : 1]
Setting
This pin should be held low (reset) when power
is applied, and the held high at other times.
Input frequency
Must be held high.
Multiplier setting
Notes
When the circuit is not used, this pin
may be held low to save power.
P1SEL2
0
0
1
P1SEL1
0
1
0
Multiplier
forbidden
2
4
ICLOCK frequency

26 MHz to 33 MHz
13 MHz to 20 MHz
Internal operating frequency

26 MHz to 40 MHz
26 MHz to 40 MHz
2. Operating Procedures
This section presents the operating procedures for using this IC.
2. 1. Operating Procedures Overview
This section presents an overview of the processing used to operate this IC.
• Initialization
Initialization is the processing performed after either the input of either a hardware reset (NRST) or the execution
of a software reset. Initialization clears the IC internal memory and sets up the operating conditions.
• Path data write
The path data write operation consists of the input processing for the path data used by the IC to generate
multi-level gray-scale data.
• Gray-scale data readout
The gray-scale data readout operation consists of the output processing for the multi-level gray-scale data
generated by this IC.
• Interrupt signal wait
The interrupt signal wait operation is the standby processing performed by the external CPU until this IC
issues an external interrupt signal when interrupt controlled processing is used.
SDF00008BEM
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