LC89058W-E Datasheet, PDF (53/64 Pages) Sanyo Semicon Device – Digital Audio Interface Receiver

LC89058W-E
CCB address: 0xE8; Command address: 12; Data I/O setting 2
DI7
DI6
DI5
DI4
DI3
DI2
DI1
DI0
1
1
0
1
0
0
CAU
CAL
DI15
0
DI14
RXSEL2
DI13
RXSEL1
DI12
RXSEL0
DI11
EDTMUT
DI10
EMCKP
DI9
EXTSEL
DI8
GPIOS
GPIOS
Setting of pins 44 to 47 input function (when INT pull-down is set)
0: General-purpose I/O parallel input (initial value)
I: Selector input
EXTSEL
RMCK, RBCK, RLRCK, and RDATA output setting
0: Output data and clock of DIR function (initial value).
1: Output input signals to GPIO0, GPIO1, GPIO2, GPIO3 (GPIOS=1)
EMCKP
GPIO0 output polarity setting (GPIOS=1)
0: Normal output (Initial value)
1: Inverted output
EDTMUT
GPIO3 mute setting (GPIOS=1)
0: Normal output (initial value)
1: Muted
RXSEL[2:0]
RXOUT2 output data setting
000: “L” fixed output (initial value)
001: RX0 input data
010: RX1 input data
011: RX2 input data
100: RX3 input data
101: RX4 input data
110: RX5 input data
111: RX6 input data
• GPIOS setting is needed when RMCK, RBCK, RLRCK, and RDATA output are changed with EXTSEL.
• RMCK, RBCK, RLRCK, and RDATA output don’t change even if it sets to EXTSEL=1 in the state of GPIOS=0.
No.A1056-53/64