PYTHON25K Datasheet, PDF (48/87 Pages) ON Semiconductor – PYTHON 25K/16K/12K/10K Global Shutter CMOS Image Sensors

NOIP1SN025KA, NOIP1SN016KA, NOIP1SN012KA, NOIP1SN010KA
kernel N−2 kernel N−1
kernel N
kernel N+1
0 125 4 121 8 117 12 113 1 124 5 120 9 116 13 112
48 77 52 73 56 69 60 65 49 76 53 72 57 68 61 64
Every 8^th
channel
Figure 47. Data Output Order for 4 LVDS Output Channels in Subsampling Mode on a Color Sensor
Frame Rate
Frame rate for subsampling and binning mode is
compared to the normal mode. Assume the y-resolution is
the programmed number of lines to read out.
Normal Readout
The frame time in normal readout mode is shown by the
following formula:
Frame Time = t_FOT + (y-resolution) x (t_ROT + t_readout)
The frame rate is equal to 1/FrameTime. Nominal frame
rate for full frame readout is 80 fps in Zero−ROT mode.
Subsampling Mode
The frame time for subsampled readout is shown by the
following formula:
Frame Time = t_FOT + (y-resolution / 2) x (t_ROT + t_readout / 2),
where t_ROT represents the equivalent ROT time for a
normal readout of the same frame. Analogous readout
represents the equivalent readout time for normal readout.
Binning Mode
The frame time for subsampled readout is given by the
following formula:
Frame Time = t_FOT + (y-resolution / 2) x (t_ROT x 2+ t_readout
/ 2),
where t_ROT represents the equivalent ROT time for a
normal readout of the same frame. Analogous readout
represents the equivalent readout time for normal readout.
Test Pattern Generation
The data block provides several test pattern generation
capabilities. Figure 48 shows the functional diagram for the
data channels. It is possible to inject synthesized test patterns
at various points. Refer to the Register Map on page 50 for
the test mode configuration registers (registers 144 to 150).
The test pattern modes are summarized in Table 29. Note
that these modes only exist for the data channel. The sync
and clock channels do not provide this functionality.
For each test mode, the user can select whether the
generated data is framed. When the register
frame_testpattern is asserted, the test data simply replaces
the ADC data. This means that the test data is only sent
between frame/line start and frame/line end indications.
Outside these windows, regular training patterns are sent, as
during normal operation. CRC is calculated and inserted as
for normal data for the fixed and incrementing test pattern
generation.
Table 29. TEST MODE SUMMARY
Register Configuration
prbs_en
testpattern_en testpattern
0
0
X
0
1
0
0
1
1
1
X
X
Description
Normal operation mode
Fixed pattern generation.
Pattern is defined by testpattern register
Incrementing pattern generation.
Initial value is determined by testpattern.
PRBS data generation. The testpattern register determines the seed for the
PRBS generator.
When frame_testpattern is deasserted, the output is constantly replaced by the generated test data. No training patterns are
generated.
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