PYTHON25K Datasheet, PDF (28/87 Pages) ON Semiconductor – PYTHON 25K/16K/12K/10K Global Shutter CMOS Image Sensors

NOIP1SN025KA, NOIP1SN016KA, NOIP1SN012KA, NOIP1SN010KA
Exposure State
Readout
Image Array Global Reset
FOT Reset
FOT
Frame N
Integrating
FOT Reset
FOT
Frame N+1
Integrating
FOT
FOT
fr_length
exposure
= ROT
= Readout
Figure 22. Integration Control for Pipelined Global Shutter Mode (Master, fr_mode = 0x0)
Exposure State
Readout
Image Array Global Reset
FOT Reset
FOT
Frame N
Integrating
FOT Reset
FOT
Frame N+1
Integrating
FOT
FOT
exposure x mult_timer
fr_length x mult_timer
= ROT
= Readout
Figure 23. Integration Control for Pipelined Global Shutter Mode (Master, fr_mode = 0x1)
Exposure State
trigger0
Readout
Image Array Global Reset
FOT Reset
FOT
Frame N
Integrating
FOT
(No effect on falling edge )
Reset
Frame N+1
Integrating
FOT
FOT
FOT
= ROT
= Readout
exposure x mult_timer
Figure 24. Exposure Time Control in Triggered Global Mode (Master)
Triggered Global Shutter (Slave)
Exposure or integration time is fully controlled by means
of the trigger pin in slave mode. The registers fr_length,
exposure, and mult_timer are ignored by the sensor.
A rising edge on the trigger pin indicates the start of the
exposure time, while a falling edge initiates the transfer and
readout of the image array. In other words, the high time of
the trigger pin indicates the integration time, the period of
the trigger pin indicates the frame time.
The use of the trigger during slave mode is shown in
Figure 25.
NOTES:
• The start of the exposure time is synchronized to the
start of a new line (during ROT) if the exposure period
starts during a frame readout. Therefore, the effective
time during which the image core is in a reset state is
extended to the start of a new line.
• If the trigger is deasserted before the end of readout, the
exposure time is extended until the end of the last
active line. Consequently the FOT and start of frame
readout is postponed accordingly.
• The trigger pin needs to be kept low during the FOT.
The monitor pins can be used as a feedback to the
FPGA/controller (eg. use monitor0, indicating the very
first line when monitor_select = 0x5 − a new trigger can
be initiated after a rising edge on monitor0).
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