LC786821E Datasheet, PDF (26/35 Pages) ON Semiconductor – Compressed Audio Signal Processor IC

LC786821E
Stream Data Input/Output Function
There are 2 ways to input/output the stream data.
(1) 4-wire method
Stream Input
: During STREQO="H" output, input STLRCKI/STBCKI/STDATI.
In the case of 4-wire method, STLRCKI/STBCKI/STDATI (input state) are normal audio
inputs/outputs. As same as the format, 4byte (32bit) data transmission/reception is done in one
period of STLRCKI (input state).
(2) 3-wire method
Stream Input : Input STBCKI/STDATI while STREQO="H" output.
Stream Output : Output STBCKO/STDATO while STREQI="H" input.
In the case of 3-wire method, depending on the state of STREQO, only inputs the bit clock and
data, or depending on the state of STREQI, only outputs the bit clock and data, and data
communication unit becomes 2byte (16bit). Also in the 3-wire method of the stream output, it is
possible that users just input the clock (STBCKI) and it will output the data only.
- Characteristics of Stream Data Input Timing
STREQO
(Output)
tSLRH tSLRS
STLRCKI
(Input)
tSTCKIN
1/fSCI
tSTCKL tSTCKH
STBCKI
(Input)
STDATI
(Input)
tSTDSU tSTDHD
*Relationship between signal name and pin
STREQO : GP33/GP43/GP53
STLRCKI : GP30/GP40/GP50
STBCKI : GP31/GP41/GP51
STDATI : GP32/GP42/GP52
Note: When each pin is set as stream input simultaneously, they will be processed as below priority;
(1) GP30 to 33, (2) GP40 to 43, (3) GP50 to 53
For example, if set all pins to stream input mode, stream data will be processed on only data in GP30 to 33.
Data in GP40 to 43, GP 50 to 53 will not be processed in the LSI.
Parameter
Symbol
Signal Names
Min Typ Max unit
STBCKI Clock Frequency
fSCI
STBCKI
4.24 MHz
Stream Input Start Time
tSTCKIN
STREQO,
STBCKI, STLRCKI
50
ns
STBCKI "H" Period
tSTCKH
STBCKI
100
ns
STBCKI "L" Period
tSTCKL
STBCKI
100
ns
STLRCKI Set-Up Time
tSLRS STLRCKI, STBCKI 75
ns
STLRCKI Hold Time
tSLRH STLRCKI, STBCKI 75
ns
STDATI Set-Up Time
tSTDSU STDATI, STBCKI
75
ns
STDATI Hold Time
tSTDHD STDATI, STBCKI
75
ns
Note: Above diagram shows the case of data input at rising edge of STBCKI. The timing is the same if using
falling edge synchronization.
www.onsemi.com
26