LC786821E Datasheet, PDF (19/35 Pages) ON Semiconductor – Compressed Audio Signal Processor IC

LC786821E
IIC can be used for the transmission/reception from the host microcontroller.
Supported modes are;
Normal Mode
: 100kbps
High Speed Mode : 400kbps
Slave address is 0x16 (7bit value).
- Condition for Communication(IIC) Timing With Host Microcontroller
SDA
[SIFDI]
(Inout)
SCL
[SIFCK]
(Input)
tF
tLOW
tHD;STAtR
Start Condition
tSU;DAT
tHIGH
tHD;DAT
tHD;STA
tSU;STA
ReStart Condition
tBUF
tR
tSU;STO
Stop Condition
Parameter
Symbol ^{Normal (100kbps)}
Min
Max
SCL Frequency
fSCL
0
100
Bus Open Time
tBUF
4.7
SCL "L" Period
tLOW
4.7
SCL "H" Period
tHIGH
4.0
Start/ReStart Condition Hold Time
tHD;STA
4.0
Start/ReStart Condition Set-Up Time tSU;STA
4.7
SDA Hold Time
tHD;DAT
0
SDA Set-Up Time
tSU;DAT
250
SDA, SCL Rise Time
tR
1000
SDA, SCL Fall Time
tF
300
Stop Condition Set-Up Time
tSU;STO
4.0
Note: Cb is the total capacity added to each bus (Unit: pF)
High Speed
(400kbps)
Min
Max
0
400
1.3
1.3
0.6
0.6
0.6
0
100
20+0.1Cb 300
20+0.1Cb 300
0.6
Unit
kHz
s
s
s
s
s
s
ns
ns
ns
s
When using IIC, SIFDO/SIFCE/BUSYB pins can be used as GPIOs as below;
SIFDO : GP00
SIFCE : GP01
BUSYB : GP02
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