LC786821E Datasheet, PDF (17/35 Pages) ON Semiconductor – Compressed Audio Signal Processor IC

LC786821E
Microcontroller Interface
Reception/Transmission from the host microcontroller is done by the SPI synchronous SIO communication.
The format of the data transmission is as below.
- Code of M5 to M0 at the ModeCode transmission must be followed by the specification of the internal software inside
this LSI.
When data input in M5 to M0 and value in the internal register matches, SIFDO becomes “L” (Ack) and communication
will be enabled. If no match, SIFDO becomes “H” (Nack) and communication will not be enabled.
- Judgement whether command transmission or reception will be done by the 7^th bit data of the ModeCode transmission.
“L” means command transmission and “H” means data reception.
- Need to care the communication timing specification because the specification differs by operational mode (normal /
low speed) of the internal microcontroller.
- Communication interface with the host microcontroller
SIFCE
SIFCK
SIFDI
MODE
(Send)
Command Command
1
2
Command
N
MODE
(Receive)
SIFDO
Ack
BUSYB
Data
Data
Data
Ack
1
2
N
- Transmission/Reception format with the host microcontroller
(1) Host: Command transmission
SIFCE
1 2 3 4 5 6 7 81 2 3
678
SIFCK
SIFDI
SIFDO
M5 M4 M3 M2 M1 M0 WR
D7 D6 D5
D2 D1 D0
Mode
Code
1st-data
Nack ^byte
Ack
Last-data
byte
BUSYB
(2) Host: Data reception
SIFCE
1 2 3 4 5 6 7 81 2 3
678
SIFCK
SIFDI
SIFDO
BUSYB
M5 M4 M3 M2 M1 M0 RD
Mode
Code
Nack
Ack D7 D6 D5
D2 D1 D0
1st-data
byte
Last-data
byte
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