LC786821E Datasheet, PDF (18/35 Pages) ON Semiconductor – Compressed Audio Signal Processor IC

LC786821E
- Characteristics of Communication Timing With Host Microcontroller
SIFCE
(Input)
SIFCK
(Input)
SIFDI
(Input)
SIFDO
(Output)
BUSYB
(Output)
tCSU
tCKH
1/fCLK
tCKL
tCWSU tCWHD
tCDON
tCDOH
tCHD
tCRAS
tCBST
tCE
tCDOF
Parameter
Symbol
Pin Names
Communication Clock Frequency fCLK SIFCK
Communication Clock “H” Period tCKH SIFCK
Communication Clock “L” Period
Communication Start Allowable
Time
Communication Start Set Up
Time
Communication End Hold Time
tCKL
tCE
tCSU
tCHD
SIFCK
BUSYB, SIFCE
SIFCE, SIFCK
SIFCE, SIFCK
Data Input Set Up Time
tCWSU SIFDI, SIFCK
Data Input Hold Time
tCWHD SIFDI, SIFCK
Data Output “H” Level Rise Time tCDOH SIFDO, SIFCK
Min Typ
150
690
150
690
0
0
100
200
100
200
75
75
75
200
Data Output Settle Time
tCRAS SIFDO, SIFCK
Output ON Settle Timer *1
tCDON SIFDO, SIFCE
Output OFF Settle Timer *1
tCDOF SIFDO, SIFCE
BUSYB "L" Level Settle Time
tCBST BUSYB
*Internal Microcontroller Operation Mode Upper Value: Normal Mode
Lower Value: Low Speed Mode
Note1: tCDON/tCDOF are available only when setting SIFDO pin to 3-State output.
Max
3.3
0.725
100
350
100
350
100
100
150
150
150
350
Unit
MHz
ns
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