LC786821E Datasheet, PDF (24/35 Pages) ON Semiconductor – Compressed Audio Signal Processor IC

LC786821E
Parameter
(Electronic Volume)
Input Impedance
Symbol
Pin
Names
Conditions
Min
Typ
LVRIN,
RVRIN,
SWIN
7.5
10
15
20
Volume Setting range
Mute Level
Volume Setting Step
Volume Setting Step Error
70
LFOUT,
80
90
LROUT,
RFOUT,
0 to 32dB
0.25
RROUT,
32 to 70dB
1.0
SWOUT
0 to 32dB 0.125
32 to 70dB
0.5
Max Unit
kΩ
kΩ
0
dB
dB
dB
dB
0.125 dB
0.5
dB
- Audio Digital Data Input/Output Function
- Audio Input/Output Supported Format
Mode
IIS
Input
MSB First Right Aligned
MSB First Left Aligned
Output
IIS
MSB First Right Aligned
MSB First Left Aligned
Bit Length
16bit
24bit
16bit
24bit
Slot Length
32fs, 48fs, 64fs
Fs384 Clock
Internal Clock
External Clock
32fs, 48fs, 64fs Fs384 Clock Output
- Applied Pins
LRCK
BCK
DATA
Fs384 Clock
GP30
GP31
GP32
GP33
Input
GP40
GP41
GP42
GP43
GP50
GP51
GP52
GP53
Output
GP30
GP40
GP50
GP31
GP41
GP51
GP32
GP42
GP52
GP33
GP43
GP53
Note: When each pin is set as audio input simultaneously, they will be processed as below priority;
(1) GP30 to 33, (2) GP40 to 43, (3) GP50 to 53
For example, if set all pins to audio input mode, audio data will be processed on only data in GP30 to 33.
- Other
Data in GP40 to 43, GP 50 to 53 will not be processed in the LSI.
- Audio output can be supported in 3 kinds of Fs (32kHz/44.1kHz/48kHz).
- When inputting external audio, GP14/GP46 can support input of emphasis signals.
- Characteristics of Audio Data Input Timing
tFCKIH
tFCKIL
1/fFCKI
Fs384ck
(=Fs384 clock)
tALRIH
tALRIS
LRCK
BCK
DATA
tABKIH
tABKIL
1/fABCKI
tADTIS tADTIH
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