PHN203 Datasheet, PDF (8/13 Pages) NXP Semiconductors – Dual N-channel enhancement mode TrenchMOS transistor

NXP Semiconductors
30
I_S
(A)
V_GS = 0 V
20
PHN203
Dual N-channel TrenchMOS logic level FET
03ae51
10
0
0
150 °C
T_j = 25 °C
0.3
0.6
0.9
1.2
V_SD (V)
Fig 13. Source current as a function of source-drain voltage; typical values
PHN203
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 27 April 2010
© NXP B.V. 2010. All rights reserved.
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