PHU108NQ03LT Datasheet, PDF (6/14 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET

Philips Semiconductors
PHB/PHD/PHU108NQ03LT
N-channel TrenchMOS™ logic level FET
80
I_D
(A)
V_GS (V) =
60
40
20
10 6 5 4.5
03ar61
4
3.5
3
2.5
15
R_DSon
(mΩ)
V_GS (V) =
10
5
03ar62
3.5
4
4.5
5
6
10
2
0
0
0.2
0.4
0.6
0.8
1
V_DS (V)
0
0
20
40
60
80
I_D (A)
T_j = 25 °C
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values
T_j = 25 °C
Fig 6. Drain-source on-state resistance as a function
of drain current; typical values
80
I_D
(A)
60
03ar63
2
a
1.5
03af18
40
1
20
0.5
T_j = 175 °C
25 °C
0
0
1
2
3 _{VGS (V)} 4
T_j = 25 °C and 175 °C; V_DS > I_D × R_DSon
Fig 7. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
0
-60
0
60
120
180
T_j (°C)
a = --------^R----^D----^S---^o--ⁿ---------
R_{DSon(25 °C)}
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature
9397 750 14707
Product data sheet
Rev. 03 — 18 April 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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