74HCT9046A Datasheet, PDF (19/43 Pages) NXP Semiconductors – PLL with bandgap controlled VCO

NXP Semiconductors
74HCT9046A
PLL with band gap controlled VCO
I_I
∆V_I
mbd108
800
R_I
(kΩ)
600
mga956 - 1
self-bias operating point
V_I
Fig 14. Typical input resistance curve at SIG_IN and
COMP_IN
5
I_I
(µA)
V_CC = 5.5V
mga957
4.5 V
0
4.5 V
5.5 V
400
V_CC =
4.5 V
200
0
(0.5 V_CC) − 0.25
5.5 V
0.5 V_CC
(0.5 V_CC) + 0.25
V_I (V)
Fig 15. Input resistance at SIG_IN; COMP_IN with
∆V_I = 0.5 V at self-bias point
60
V_offset
(mV)
40
mga958
20
V_CC = 4.5 V
0
5.5 V
−20
−5
(0.5 V_CC) − 0.25
0.5 VCC
(0.5 V_CC) + 0.25
V_I (V)
Fig 16. Input current at SIG_IN; COMP_IN with
∆V_I = 0.5 V at self-bias point
−40
(0.5 V_CC) − 2
0.5 V_CC
(0.5 V_CC) + 2
V_{VCO_IN} (V)
___ R_s = 50 kΩ
- - - R_s = 300 kΩ
Fig 17. Offset voltage at demodulator output as a
function of VCO_IN and R_s
74HCT9046A_6
Product data sheet
Rev. 06 — 15 September 2009
© NXP B.V. 2009. All rights reserved.
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