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SE98A Datasheet, PDF (15/43 Pages) NXP Semiconductors – DDR memory module temp sensor, 1.7 V to 3.6 V
NXP Semiconductors
SE98A
DDR memory module temp sensor, 1.7 V to 3.6 V
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2
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9
SCL
(cont.)
SDA
A6 A5 A4 A3 A2 A1 A0
S
R
(cont.)
A
START
by host
device address and read
ACK
by device
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2
3
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5
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9
1
2
3
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5
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SCL
SDA
D15 D14 D13 D12 D11 D10 D9
returned most significant byte data
D8
D7
A
ACK
by host
D6 D5 D4 D3 D2 D1
returned least significant byte data
D0
NA P
NACK STOP
by host
002aab414
A = ACK = Acknowledge bit. NA = Not Acknowledge bit. W = Write bit = 0. R = Read bit = 1.
Fig 11. SMBus/I2C-bus word read from register with a pre-set pointer
7.10 Hot plugging
The SE98A can be used in hot plugging applications. Internal circuitry prevents damaging
current backflow through the device when it is powered down, but with the I2C-bus,
EVENT or address pins still connected. The open-drain SDA and EVENT pins (SCL and
address pins are input only) effectively places the outputs in a high-impedance state
during power-up and power-down, which prevents driver conflict and bus contention. The
50 ns noise filter will filter out any insertion glitches from the state machine, which is very
robust and not prone to false operation.
The device needs a proper power-up sequence to reset itself, not only for the device
I2C-bus and I/O initial states, but also to load specific pre-defined data or calibration data
into its operational registers. The power-up sequence should occur correctly with a fast
ramp rate and the I2C-bus active. The SE98A might not respond immediately after
power-up, but it should not damage the part if the power-up sequence is abnormal. If the
SCL line is held LOW, the part will not exit the power-on reset mode since the part is held
in reset until SCL is released.
SE98A_2
Product data sheet
Rev. 02 — 6 August 2009
© NXP B.V. 2009. All rights reserved.
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