DS90C3202 Datasheet, PDF (7/22 Pages) National Semiconductor (TI) – 3.3V 8 MHz to 135 MHz Dual FPD-Link Receiver

AC Timing Diagrams (Continued)
FIGURE 2. “Worst Case” Test Pattern
FIGURE 3. Incremental Test Pattern
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FIGURE 4. Typical and Max ICC with Worse Case and Incremental Pattern
FIGURE 5. LVCMOS/LVTTL Output Load and Transition Times
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