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DS90C3202 Datasheet, PDF (10/22 Pages) National Semiconductor (TI) – 3.3V 8 MHz to 135 MHz Dual FPD-Link Receiver
AC Timing Diagrams (Continued)
RegisterAddress 29d/1dh bit [2:1] = 00b
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FIGURE 12. Receiver RSRC and RHRC Output Setup/Hold Time — PTO Enabled
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FIGURE 13. Receiver RSRC and RHRC Output Setup/Hold Time Adjustment — PTO Disabled
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