English
Language : 

DS90C3202 Datasheet, PDF (6/22 Pages) National Semiconductor (TI) – 3.3V 8 MHz to 135 MHz Dual FPD-Link Receiver
Two-Wire Serial Communication Interface
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
fSC
S2CLK Clock Frequency
SC:LOW
Clock Low Period
RP = 4.7KΩ, CL = 50pF
1.5
SC:HIGH
Clock High Period
RP = 4.7KΩ, CL = 50pF
0.6
SCD:TR
S2CLK and S2DAT Rise Time
RP = 4.7KΩ, CL = 50pF
SCD:TF
S2CLK and S2DAT Fall Time
RP = 4.7KΩ, CL = 50pF
SU:STA
Start Condition Setup Time
RP = 4.7KΩ, CL = 50pF
0.6
HD:STA
Start Condition Hold Time
RP = 4.7KΩ, CL = 50pF
0.6
HD:STO
Stop Condition Hold Time
RP = 4.7KΩ, CL = 50pF
0.6
SC:SD
Clock Falling Edge to Data
RP = 4.7KΩ, CL = 50pF
0
SD:SC
Data to Clock Rising Edge
RP = 4.7KΩ, CL = 50pF
0.1
SCL:SD
S2CLK Low to S2DAT Data
RP = 4.7KΩ, CL = 50pF
0.1
Valid
BUF
Bus Free Time
RP = 4.7KΩ, CL = 50pF
13
AC Timing Diagrams
Max
Units
400
kHz
us
us
0.3
us
0.3
us
us
us
us
us
us
0.9
us
us
FIGURE 1. Two-Wire Serial Communication Interface Timing Diagram
20147122
www.national.com
6