DS16EV5110_0706 Datasheet, PDF (6/18 Pages) National Semiconductor (TI) – Video Equalizer for DVI, HDMI, and Cat5 Cables

Electrical Characteristics — Serial Management Bus Interface (Notes 2, 3)
Over recommended operating supply and temperature ranges unless other specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Serial Bus Interface — DC Specifications
V_IL
V_IH
I_PULLUP
Data, Clock Input Low Voltage
Data, Clock Input High Voltage
Current through pull-up resistor or VOL = 0.4V
current source
0.8
2.8
V_DD
10
V_DD
I_LEAK-Bus
I_LEAK-Pin
C_I
R_TERM
Nominal Bus Voltage
Input Leakage per bus segment
Input Leakage per device pin
Capacitance for SDA and SDC
Termination Resistance
(Note 9)
(Notes 9, 10)
V_DD3.3
(Notes 9, 10, 11)
3.0
—200
—15
2000
3.6
+200
10
V_DD2.5
(Notes 9, 10, 11)
1000
Serial Bus Interface Timing Specification
FSMB
Bus Operating Frequency
(Note 12)
10
100
TBUF
Bus Free Time Between Stop and
Start Condition
4.7
THD:STA
Hold Time After (Repeated) Start At I_PULLUP, Max
Condition. First CLK generated
4.0
after this period.
TSU:STA
Repeated Start Condition Setup
Time
4.7
TSU:STO Stop Condition Setup Time
4.0
THD:DAT Data Hold Time
300
TSU:DAT
Data Setup Time
250
T_TIMEOUT
T_LOW
T_HIGH
T_LOW:SEXT
Detect Clock Low Timeout
Clock Low Period
Clock High Period
Cumulative Clock Low Extend
Time (Slave Device)
(Note 12)
(Note 12)
(Note 12)
25
35
4.7
4.0
50
2
t_F
Clock/Data Fall Time
(Note 12)
t_R
Clock/Data Rise Time
(Note 12)
t_POR
Time in which a device must be (Note 12)
operational after power-on reset
300
1000
500
Units
V
V
mA
V
µA
µA
pF
Ω
Ω
kHz
µs
µs
µs
µs
ns
ns
ms
µs
µs
ms
ns
ns
ms
Note 9: Recommended value. Parameter not tested in production.
Note 10: Recommended maximum capacitance load per bus segment is 400pF.
Note 11: Maximum termination voltage should be identical to the device supply voltage.
Note 12: Compliant to SMBus 2.0 physical layer specification. See System Management Bus (SMBus) Specification Version 2.0, section 3.1.1 SMBus common
AC specifications for details.
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